b077854b57
Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
60 lines
964 B
Plaintext
60 lines
964 B
Plaintext
test compile precise-output
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set unwind_info=false
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target aarch64
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function %f(i32) -> i32 {
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jt0 = jump_table [block1, block2, block3]
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block0(v0: i32):
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br_table v0, block4, jt0
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block1:
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v1 = iconst.i32 1
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jump block5(v1)
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block2:
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v2 = iconst.i32 2
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jump block5(v2)
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block3:
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v3 = iconst.i32 3
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jump block5(v3)
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block4:
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v4 = iconst.i32 4
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jump block5(v4)
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block5(v5: i32):
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v6 = iadd.i32 v0, v5
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return v6
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}
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; block0:
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; emit_island 44
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; subs wzr, w0, #3
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; b.hs label1 ; csel x15, xzr, x0, hs ; csdb ; adr x14, pc+16 ; ldrsw x15, [x14, x15, uxtw #2] ; add x14, x14, x15 ; br x14 ; jt_entries [Label(MachLabel(3)), Label(MachLabel(5)), Label(MachLabel(7))]
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; block1:
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; movz x5, #4
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; b label2
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; block2:
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; b label9
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; block3:
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; movz x5, #1
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; b label4
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; block4:
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; b label9
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; block5:
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; movz x5, #2
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; b label6
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; block6:
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; b label9
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; block7:
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; movz x5, #3
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; b label8
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; block8:
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; b label9
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; block9:
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; add w0, w0, w5
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; ret
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