fb4db38dd6
The intel, arm32, and arm32 targets were only defined in the meta language previously. Add Rust implementations too. This is mostly boilerplate, except for the unit tests in the registers.rs files.
50 lines
1.6 KiB
Rust
50 lines
1.6 KiB
Rust
//! Intel register descriptions.
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use isa::registers::{RegBank, RegInfo};
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include!(concat!(env!("OUT_DIR"), "/registers-intel.rs"));
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#[cfg(test)]
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mod tests {
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use super::INFO;
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use isa::RegUnit;
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#[test]
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fn unit_encodings() {
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// The encoding of integer registers is not alphabetical.
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assert_eq!(INFO.parse_regunit("rax"), Some(0));
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assert_eq!(INFO.parse_regunit("rbx"), Some(3));
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assert_eq!(INFO.parse_regunit("rcx"), Some(1));
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assert_eq!(INFO.parse_regunit("rdx"), Some(2));
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assert_eq!(INFO.parse_regunit("rsi"), Some(6));
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assert_eq!(INFO.parse_regunit("rdi"), Some(7));
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assert_eq!(INFO.parse_regunit("rbp"), Some(5));
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assert_eq!(INFO.parse_regunit("rsp"), Some(4));
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assert_eq!(INFO.parse_regunit("r8"), Some(8));
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assert_eq!(INFO.parse_regunit("r15"), Some(15));
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assert_eq!(INFO.parse_regunit("xmm0"), Some(16));
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assert_eq!(INFO.parse_regunit("xmm15"), Some(31));
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}
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#[test]
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fn unit_names() {
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fn uname(ru: RegUnit) -> String {
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INFO.display_regunit(ru).to_string()
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}
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assert_eq!(uname(0), "%rax");
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assert_eq!(uname(3), "%rbx");
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assert_eq!(uname(1), "%rcx");
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assert_eq!(uname(2), "%rdx");
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assert_eq!(uname(6), "%rsi");
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assert_eq!(uname(7), "%rdi");
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assert_eq!(uname(5), "%rbp");
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assert_eq!(uname(4), "%rsp");
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assert_eq!(uname(8), "%r8");
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assert_eq!(uname(15), "%r15");
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assert_eq!(uname(16), "%xmm0");
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assert_eq!(uname(31), "%xmm15");
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}
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}
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