f5f517e811
This commit contains a small set of clean up items for x64. Notably: * Adds filetests * Documents why 16 for the arg base offset abi implementation, for clarity. * Fixes a bug in the spill implementation caught while anlyzing the filetests results. The fix consists of emitting a load instead of a store into the scratch register before spiiling its value. * Remove dead code for pretty printing registers which is not needed anymore since we now have proper disassembly.
145 lines
2.4 KiB
Rust
145 lines
2.4 KiB
Rust
//! X64 register definition.
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use crate::isa::reg::Reg;
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use regalloc2::{PReg, RegClass};
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const ENC_RAX: u8 = 0;
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const ENC_RCX: u8 = 1;
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const ENC_RDX: u8 = 2;
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const ENC_RBX: u8 = 3;
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const ENC_RSP: u8 = 4;
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const ENC_RBP: u8 = 5;
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const ENC_RSI: u8 = 6;
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const ENC_RDI: u8 = 7;
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const ENC_R8: u8 = 8;
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const ENC_R9: u8 = 9;
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const ENC_R10: u8 = 10;
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const ENC_R11: u8 = 11;
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const ENC_R12: u8 = 12;
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const ENC_R13: u8 = 13;
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const ENC_R14: u8 = 14;
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const ENC_R15: u8 = 15;
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fn gpr(enc: u8) -> Reg {
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Reg::new(PReg::new(enc as usize, RegClass::Int))
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}
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/// Constructors for GPR.
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pub(crate) fn rsi() -> Reg {
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gpr(ENC_RSI)
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}
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pub(crate) fn rdi() -> Reg {
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gpr(ENC_RDI)
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}
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pub(crate) fn rax() -> Reg {
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gpr(ENC_RAX)
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}
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pub(crate) fn rcx() -> Reg {
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gpr(ENC_RCX)
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}
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pub(crate) fn rdx() -> Reg {
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gpr(ENC_RDX)
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}
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pub(crate) fn r8() -> Reg {
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gpr(ENC_R8)
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}
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pub(crate) fn r9() -> Reg {
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gpr(ENC_R9)
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}
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pub(crate) fn r10() -> Reg {
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gpr(ENC_R10)
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}
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pub(crate) fn r11() -> Reg {
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gpr(ENC_R11)
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}
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pub(crate) fn r12() -> Reg {
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gpr(ENC_R12)
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}
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pub(crate) fn r13() -> Reg {
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gpr(ENC_R13)
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}
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pub(crate) fn r14() -> Reg {
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gpr(ENC_R14)
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}
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pub(crate) fn rbx() -> Reg {
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gpr(ENC_RBX)
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}
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pub(crate) fn r15() -> Reg {
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gpr(ENC_R15)
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}
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pub(crate) fn rsp() -> Reg {
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gpr(ENC_RSP)
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}
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pub(crate) fn rbp() -> Reg {
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gpr(ENC_RBP)
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}
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pub(crate) fn scratch() -> Reg {
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r11()
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}
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fn fpr(enc: u8) -> Reg {
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Reg::new(PReg::new(enc as usize, RegClass::Float))
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}
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/// Constructors for FPR.
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pub(crate) fn xmm0() -> Reg {
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fpr(0)
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}
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pub(crate) fn xmm1() -> Reg {
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fpr(1)
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}
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pub(crate) fn xmm2() -> Reg {
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fpr(2)
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}
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pub(crate) fn xmm3() -> Reg {
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fpr(3)
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}
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pub(crate) fn xmm4() -> Reg {
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fpr(4)
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}
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pub(crate) fn xmm5() -> Reg {
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fpr(5)
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}
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pub(crate) fn xmm6() -> Reg {
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fpr(6)
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}
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pub(crate) fn xmm7() -> Reg {
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fpr(7)
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}
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pub(crate) fn xmm8() -> Reg {
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fpr(8)
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}
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pub(crate) fn xmm9() -> Reg {
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fpr(9)
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}
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pub(crate) fn xmm10() -> Reg {
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fpr(10)
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}
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pub(crate) fn xmm11() -> Reg {
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fpr(11)
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}
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pub(crate) fn xmm12() -> Reg {
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fpr(12)
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}
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pub(crate) fn xmm13() -> Reg {
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fpr(13)
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}
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pub(crate) fn xmm14() -> Reg {
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fpr(14)
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}
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pub(crate) fn xmm15() -> Reg {
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fpr(15)
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}
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const GPR: u32 = 16;
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const ALLOCATABLE_GPR: u32 = (1 << GPR) - 1;
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const NON_ALLOCATABLE_GPR: u32 = (1 << ENC_RBP) | (1 << ENC_RSP) | (1 << ENC_R11);
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/// Bitmask to represent the available general purpose registers.
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pub(crate) const ALL_GPR: u32 = ALLOCATABLE_GPR & !NON_ALLOCATABLE_GPR;
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