95 lines
2.9 KiB
Plaintext
95 lines
2.9 KiB
Plaintext
test postopt
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target x86_64
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function %dual_loads(i64, i64) -> i64 {
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ebb0(v0: i64, v1: i64):
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[RexOp1rr#8001] v3 = iadd v0, v1
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v4 = load.i64 v3
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v5 = uload8.i64 v3
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v6 = sload8.i64 v3
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v7 = uload16.i64 v3
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v8 = sload16.i64 v3
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v9 = uload32.i64 v3
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v10 = sload32.i64 v3
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[Op1ret#c3] return v10
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}
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; sameln: function %dual_loads
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; nextln: ebb0(v0: i64, v1: i64):
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; nextln: v3 = iadd v0, v1
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; nextln: v4 = load_complex.i64 v0+v1
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; nextln: v5 = uload8_complex.i64 v0+v1
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; nextln: v6 = sload8_complex.i64 v0+v1
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; nextln: v7 = uload16_complex.i64 v0+v1
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; nextln: v8 = sload16_complex.i64 v0+v1
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; nextln: v9 = uload32_complex v0+v1
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; nextln: v10 = sload32_complex v0+v1
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; nextln: return v10
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; nextln: }
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function %dual_loads2(i64, i64) -> i64 {
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ebb0(v0: i64, v1: i64):
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[RexOp1rr#8001] v3 = iadd v0, v1
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v4 = load.i64 v3+1
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v5 = uload8.i64 v3+1
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v6 = sload8.i64 v3+1
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v7 = uload16.i64 v3+1
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v8 = sload16.i64 v3+1
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v9 = uload32.i64 v3+1
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v10 = sload32.i64 v3+1
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[Op1ret#c3] return v10
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}
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; sameln: function %dual_loads2
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; nextln: ebb0(v0: i64, v1: i64):
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; nextln: v3 = iadd v0, v1
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; nextln: v4 = load_complex.i64 v0+v1+1
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; nextln: v5 = uload8_complex.i64 v0+v1+1
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; nextln: v6 = sload8_complex.i64 v0+v1+1
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; nextln: v7 = uload16_complex.i64 v0+v1+1
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; nextln: v8 = sload16_complex.i64 v0+v1+1
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; nextln: v9 = uload32_complex v0+v1+1
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; nextln: v10 = sload32_complex v0+v1+1
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; nextln: return v10
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; nextln: }
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function %dual_stores(i64, i64, i64) {
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ebb0(v0: i64, v1: i64, v2: i64):
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[RexOp1rr#8001] v3 = iadd v0, v1
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[RexOp1st#8089] store.i64 v2, v3
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[RexOp1st#88] istore8.i64 v2, v3
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[RexMp1st#189] istore16.i64 v2, v3
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[RexOp1st#89] istore32.i64 v2, v3
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[Op1ret#c3] return
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}
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; sameln: function %dual_stores
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; nextln: ebb0(v0: i64, v1: i64, v2: i64):
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; nextln: v3 = iadd v0, v1
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; nextln: store_complex v2, v0+v1
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; nextln: istore8_complex v2, v0+v1
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; nextln: istore16_complex v2, v0+v1
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; nextln: istore32_complex v2, v0+v1
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; nextln: return
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; nextln: }
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function %dual_stores2(i64, i64, i64) {
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ebb0(v0: i64, v1: i64, v2: i64):
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[RexOp1rr#8001] v3 = iadd v0, v1
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[RexOp1stDisp8#8089] store.i64 v2, v3+1
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[RexOp1stDisp8#88] istore8.i64 v2, v3+1
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[RexMp1stDisp8#189] istore16.i64 v2, v3+1
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[RexOp1stDisp8#89] istore32.i64 v2, v3+1
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[Op1ret#c3] return
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}
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; sameln: function %dual_stores2
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; nextln: ebb0(v0: i64, v1: i64, v2: i64):
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; nextln: v3 = iadd v0, v1
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; nextln: store_complex v2, v0+v1+1
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; nextln: istore8_complex v2, v0+v1+1
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; nextln: istore16_complex v2, v0+v1+1
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; nextln: istore32_complex v2, v0+v1+1
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; nextln: return
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; nextln: }
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