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wasmtime/cranelift/filetests/regalloc/reload-208.cton
2018-02-23 16:16:44 -08:00

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test regalloc
set is_64bit
isa intel haswell
; regex: V=v\d+
; Filed as https://github.com/Cretonne/cretonne/issues/208
;
; The verifier complains about a branch argument that is not in the same virtual register as the
; corresponding EBB argument.
;
; The problem was the reload pass rewriting EBB arguments on "brnz v9, ebb3(v9)"
function %pr208(i64 vmctx [%rdi]) native {
gv0 = vmctx-8
heap0 = static gv0, min 0, bound 0x5000, guard 0x0040_0000
sig0 = (i64 vmctx [%rdi]) -> i32 [%rax] native
sig1 = (i64 vmctx [%rdi], i32 [%rsi]) native
fn0 = sig0 u0:1
fn1 = sig1 u0:3
ebb0(v0: i64):
v1 = iconst.i32 0
v2 = call fn0(v0)
v20 = iconst.i32 0x4ffe
v16 = icmp uge v2, v20
brz v16, ebb5
trap heap_oob
ebb5:
v17 = uextend.i64 v2
v18 = iadd_imm.i64 v0, -8
v19 = load.i64 v18
v3 = iadd v19, v17
v4 = load.i32 v3
v21 = iconst.i32 0
v5 = icmp eq v4, v21
v6 = bint.i32 v5
brnz v6, ebb2
jump ebb3(v4)
ebb3(v7: i32):
call fn1(v0, v7)
v26 = iconst.i32 0x4ffe
v22 = icmp uge v7, v26
brz v22, ebb6
trap heap_oob
ebb6:
v23 = uextend.i64 v7
v24 = iadd_imm.i64 v0, -8
v25 = load.i64 v24
v8 = iadd v25, v23
v9 = load.i32 v8+56
; check: v9 = spill
; check: brnz $V, ebb3(v9)
brnz v9, ebb3(v9)
jump ebb4
ebb4:
jump ebb2
ebb2:
v10 = iconst.i32 0
v31 = iconst.i32 0x4ffe
v27 = icmp uge v10, v31
brz v27, ebb7
trap heap_oob
ebb7:
v28 = uextend.i64 v10
v29 = iadd_imm.i64 v0, -8
v30 = load.i64 v29
v11 = iadd v30, v28
v12 = load.i32 v11+12
call fn1(v0, v12)
v13 = iconst.i32 0
v36 = iconst.i32 0x4ffe
v32 = icmp uge v13, v36
brz v32, ebb8
trap heap_oob
ebb8:
v33 = uextend.i64 v13
v34 = iadd_imm.i64 v0, -8
v35 = load.i64 v34
v14 = iadd v35, v33
v15 = load.i32 v14+12
call fn1(v0, v15)
jump ebb1
ebb1:
return
}