43a86f14d5
This also paves the way for unifying TargetIsa and MachBackend, since now they map one to one. In theory the two traits could be merged, which would be nice to limit the number of total concepts. Also they have quite different responsibilities, so it might be fine to keep them separate. Interestingly, this PR started as removing RegInfo from the TargetIsa trait since the adapter returned a dummy value there. From the fallout, noticed that all Display implementations didn't needed an ISA anymore (since these were only used to render ISA specific registers). Also the whole family of RegInfo / ValueLoc / RegUnit was exclusively used for the old backend, and these could be removed. Notably, some IR instructions needed to be removed, because they were using RegUnit too: this was the oddball of regfill / regmove / regspill / copy_special, which were IR instructions inserted by the old regalloc. Fare thee well!
84 lines
2.5 KiB
Rust
84 lines
2.5 KiB
Rust
//! The `CFGPrinter` utility.
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use alloc::vec::Vec;
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use core::fmt::{Display, Formatter, Result, Write};
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use crate::entity::SecondaryMap;
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use crate::flowgraph::{BlockPredecessor, ControlFlowGraph};
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use crate::ir::Function;
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use crate::write::{FuncWriter, PlainWriter};
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/// A utility for pretty-printing the CFG of a `Function`.
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pub struct CFGPrinter<'a> {
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func: &'a Function,
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cfg: ControlFlowGraph,
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}
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/// A utility for pretty-printing the CFG of a `Function`.
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impl<'a> CFGPrinter<'a> {
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/// Create a new CFGPrinter.
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pub fn new(func: &'a Function) -> Self {
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Self {
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func,
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cfg: ControlFlowGraph::with_function(func),
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}
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}
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/// Write the CFG for this function to `w`.
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pub fn write(&self, w: &mut dyn Write) -> Result {
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self.header(w)?;
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self.block_nodes(w)?;
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self.cfg_connections(w)?;
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writeln!(w, "}}")
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}
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fn header(&self, w: &mut dyn Write) -> Result {
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writeln!(w, "digraph \"{}\" {{", self.func.name)?;
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if let Some(entry) = self.func.layout.entry_block() {
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writeln!(w, " {{rank=min; {}}}", entry)?;
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}
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Ok(())
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}
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fn block_nodes(&self, w: &mut dyn Write) -> Result {
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let mut aliases = SecondaryMap::<_, Vec<_>>::new();
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for v in self.func.dfg.values() {
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// VADFS returns the immediate target of an alias
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if let Some(k) = self.func.dfg.value_alias_dest_for_serialization(v) {
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aliases[k].push(v);
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}
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}
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for block in &self.func.layout {
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write!(w, " {} [shape=record, label=\"{{", block)?;
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crate::write::write_block_header(w, self.func, block, 4)?;
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// Add all outgoing branch instructions to the label.
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for inst in self.func.layout.block_likely_branches(block) {
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write!(w, " | <{}>", inst)?;
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PlainWriter.write_instruction(w, self.func, &aliases, inst, 0)?;
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}
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writeln!(w, "}}\"]")?
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}
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Ok(())
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}
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fn cfg_connections(&self, w: &mut dyn Write) -> Result {
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for block in &self.func.layout {
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for BlockPredecessor {
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block: parent,
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inst,
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} in self.cfg.pred_iter(block)
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{
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writeln!(w, " {}:{} -> {}", parent, inst, block)?;
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}
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}
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Ok(())
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}
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}
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impl<'a> Display for CFGPrinter<'a> {
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fn fmt(&self, f: &mut Formatter) -> Result {
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self.write(f)
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}
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}
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