Afonso Bordado
4337ccd4b7
riscv64: Support non 128bit vector sizes (#6266)
* riscv64: Add `Zvl` extensions
* riscv64: Allow lowering SIMD operations that fit in a vector register
* riscv64: Support non 128bit vector sizes
* riscv64: Add Zvl Presets
* riscv64: Precompute `min_vec_reg_size`
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