eb1052718b
Two new pieces of information are available for all encoding recipes: - The size in bytes of an encoded instruction, and - The range of a branch encoded with the recipe, if any. In the meta language, EncRecipe takes two new constructor arguments. The size is required for all encodings and branch_range is required for all recipes used to encode branches.
127 lines
4.6 KiB
Rust
127 lines
4.6 KiB
Rust
//! Register constraints for instruction operands.
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//!
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//! An encoding recipe specifies how an instruction is encoded as binary machine code, but it only
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//! works if the operands and results satisfy certain constraints. Constraints on immediate
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//! operands are checked by instruction predicates when the recipe is chosen.
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//!
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//! It is the register allocator's job to make sure that the register constraints on value operands
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//! are satisfied.
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use binemit::CodeOffset;
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use isa::{RegClass, RegUnit};
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/// Register constraint for a single value operand or instruction result.
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pub struct OperandConstraint {
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/// The kind of constraint.
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pub kind: ConstraintKind,
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/// The register class of the operand.
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///
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/// This applies to all kinds of constraints, but with slightly different meaning.
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pub regclass: RegClass,
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}
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/// The different kinds of operand constraints.
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#[derive(Clone, Copy, PartialEq, Eq)]
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pub enum ConstraintKind {
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/// This operand or result must be a register from the given register class.
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Reg,
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/// This operand or result must be a fixed register.
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///
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/// The constraint's `regclass` field is the top-level register class containing the fixed
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/// register.
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FixedReg(RegUnit),
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/// This result value must use the same register as an input value operand. Input operands
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/// can't be tied.
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///
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/// The associated number is the index of the input value operand this result is tied to.
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///
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/// The constraint's `regclass` field is the top-level register class containing the tied
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/// operand's register class.
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Tied(u8),
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/// This operand must be a value in a stack slot.
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///
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/// The constraint's `regclass` field is the register class that would normally be used to load
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/// and store values of this type.
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Stack,
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}
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/// Value operand constraints for an encoding recipe.
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#[derive(Clone)]
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pub struct RecipeConstraints {
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/// Constraints for the instruction's fixed value operands.
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///
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/// If the instruction takes a variable number of operands, the register constraints for those
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/// operands must be computed dynamically.
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///
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/// - For branches and jumps, EBB arguments must match the expectations of the destination EBB.
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/// - For calls and returns, the calling convention ABI specifies constraints.
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pub ins: &'static [OperandConstraint],
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/// Constraints for the instruction's fixed results.
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///
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/// If the instruction produces a variable number of results, it's probably a call and the
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/// constraints must be derived from the calling convention ABI.
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pub outs: &'static [OperandConstraint],
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}
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/// Constraints on the range of a branch instruction.
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///
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/// A branch instruction usually encodes its destination as a signed n-bit offset from an origin.
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/// The origin depends on the ISA and the specific instruction:
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///
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/// - RISC-V and ARM Aarch64 use the address of the branch instruction, `origin = 0`.
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/// - Intel uses the address of the instruction following the branch, `origin = 2` for a 2-byte
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/// branch instruction.
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/// - ARM's A32 encoding uses the address of the branch instruction + 8 bytes, `origin = 8`.
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#[derive(Clone, Copy)]
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pub struct BranchRange {
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/// Offset in bytes from the address of the branch instruction to the origin used for computing
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/// the branch displacement. This is the destination of a branch that encodes a 0 displacement.
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pub origin: u8,
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/// Number of bits in the signed byte displacement encoded in the instruction. This does not
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/// account for branches that can only target aligned addresses.
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pub bits: u8,
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}
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impl BranchRange {
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/// Determine if this branch range can represent the range from `branch` to `dest`, where
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/// `branch` is the code offset of the branch instruction itself and `dest` is the code offset
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/// of the destination EBB header.
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///
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/// This method does not detect if the range is larger than 2 GB.
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pub fn contains(self, branch: CodeOffset, dest: CodeOffset) -> bool {
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let d = dest.wrapping_sub(branch + self.origin as CodeOffset) as i32;
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let s = 32 - self.bits;
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d == d << s >> s
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn branch_range() {
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// ARM T1 branch.
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let t1 = BranchRange { origin: 4, bits: 9 };
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assert!(t1.contains(0, 0));
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assert!(t1.contains(0, 2));
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assert!(t1.contains(2, 0));
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assert!(t1.contains(1000, 1000));
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// Forward limit.
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assert!(t1.contains(1000, 1258));
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assert!(!t1.contains(1000, 1260));
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// Backward limit
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assert!(t1.contains(1000, 748));
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assert!(!t1.contains(1000, 746));
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}
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}
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