These backends will be removed in the future (see bytecodealliance/rfcs#12 and the pending #3009 in this repo). In the meantime, to more clearly communicate that they are using "legacy" APIs and will eventually be removed, this PR places them in an `isa/legacy/` subdirectory. No functional changes otherwise.
87 lines
3.0 KiB
Rust
87 lines
3.0 KiB
Rust
//! x86 register descriptions.
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use crate::isa::registers::{RegBank, RegClass, RegClassData, RegInfo, RegUnit};
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include!(concat!(env!("OUT_DIR"), "/registers-x86.rs"));
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#[cfg(test)]
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mod tests {
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use super::*;
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use crate::isa::RegUnit;
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use alloc::string::{String, ToString};
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#[test]
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fn unit_encodings() {
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fn gpr(unit: usize) -> Option<u16> {
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Some(GPR.unit(unit))
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}
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// The encoding of integer registers is not alphabetical.
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assert_eq!(INFO.parse_regunit("rax"), gpr(0));
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assert_eq!(INFO.parse_regunit("rbx"), gpr(3));
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assert_eq!(INFO.parse_regunit("rcx"), gpr(1));
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assert_eq!(INFO.parse_regunit("rdx"), gpr(2));
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assert_eq!(INFO.parse_regunit("rsi"), gpr(6));
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assert_eq!(INFO.parse_regunit("rdi"), gpr(7));
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assert_eq!(INFO.parse_regunit("rbp"), gpr(5));
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assert_eq!(INFO.parse_regunit("rsp"), gpr(4));
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assert_eq!(INFO.parse_regunit("r8"), gpr(8));
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assert_eq!(INFO.parse_regunit("r15"), gpr(15));
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fn fpr(unit: usize) -> Option<u16> {
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Some(FPR.unit(unit))
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}
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assert_eq!(INFO.parse_regunit("xmm0"), fpr(0));
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assert_eq!(INFO.parse_regunit("xmm15"), fpr(15));
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// FIXME(#1306) Add these tests back in when FPR32 is re-added.
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// fn fpr32(unit: usize) -> Option<u16> {
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// Some(FPR32.unit(unit))
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// }
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// assert_eq!(INFO.parse_regunit("xmm0"), fpr32(0));
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// assert_eq!(INFO.parse_regunit("xmm31"), fpr32(31));
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}
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#[test]
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fn unit_names() {
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fn gpr(ru: RegUnit) -> String {
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INFO.display_regunit(GPR.first + ru).to_string()
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}
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assert_eq!(gpr(0), "%rax");
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assert_eq!(gpr(3), "%rbx");
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assert_eq!(gpr(1), "%rcx");
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assert_eq!(gpr(2), "%rdx");
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assert_eq!(gpr(6), "%rsi");
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assert_eq!(gpr(7), "%rdi");
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assert_eq!(gpr(5), "%rbp");
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assert_eq!(gpr(4), "%rsp");
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assert_eq!(gpr(8), "%r8");
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assert_eq!(gpr(15), "%r15");
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fn fpr(ru: RegUnit) -> String {
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INFO.display_regunit(FPR.first + ru).to_string()
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}
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assert_eq!(fpr(0), "%xmm0");
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assert_eq!(fpr(15), "%xmm15");
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// FIXME(#1306) Add these tests back in when FPR32 is re-added.
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// fn fpr32(ru: RegUnit) -> String {
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// INFO.display_regunit(FPR32.first + ru).to_string()
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// }
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// assert_eq!(fpr32(0), "%xmm0");
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// assert_eq!(fpr32(31), "%xmm31");
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}
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#[test]
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fn regclasses() {
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assert_eq!(GPR.intersect_index(GPR), Some(GPR.into()));
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assert_eq!(GPR.intersect_index(ABCD), Some(ABCD.into()));
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assert_eq!(GPR.intersect_index(FPR), None);
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assert_eq!(ABCD.intersect_index(GPR), Some(ABCD.into()));
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assert_eq!(ABCD.intersect_index(ABCD), Some(ABCD.into()));
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assert_eq!(ABCD.intersect_index(FPR), None);
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assert_eq!(FPR.intersect_index(FPR), Some(FPR.into()));
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assert_eq!(FPR.intersect_index(GPR), None);
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assert_eq!(FPR.intersect_index(ABCD), None);
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}
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}
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