Jakob Stoklund Olesen e641c97670 Add RISC-V encodings for brz and brnz. ...

These branches compare a register to zero. RISC-V implements this with
the %x0 hard-coded zero register.

2017-04-03 15:20:57 -07:00

..

meta

Add RISC-V encodings for brz and brnz.

2017-04-03 15:20:57 -07:00

src

Add RISC-V encodings for brz and brnz.

2017-04-03 15:20:57 -07:00

build.rs

Upgrade to rustfmt 0.8.0.

2017-03-14 10:48:05 -07:00

Cargo.toml

Move library crates under 'lib/'.

2016-10-17 14:44:43 -07:00