364 lines
13 KiB
Rust
364 lines
13 KiB
Rust
//! Legalize instructions.
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//!
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//! A legal instruction is one that can be mapped directly to a machine code instruction for the
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//! target ISA. The `legalize_function()` function takes as input any function and transforms it
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//! into an equivalent function using only legal instructions.
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//!
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//! The characteristics of legal instructions depend on the target ISA, so any given instruction
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//! can be legal for one ISA and illegal for another.
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//!
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//! Besides transforming instructions, the legalizer also fills out the `function.encodings` map
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//! which provides a legal encoding recipe for every instruction.
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//!
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//! The legalizer does not deal with register allocation constraints. These constraints are derived
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//! from the encoding recipes, and solved later by the register allocator.
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use crate::cursor::{Cursor, FuncCursor};
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use crate::flowgraph::ControlFlowGraph;
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use crate::ir::types::I32;
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use crate::ir::{self, InstBuilder, InstructionData, MemFlags};
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use crate::isa::TargetIsa;
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mod globalvalue;
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mod heap;
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mod table;
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use self::globalvalue::expand_global_value;
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use self::heap::expand_heap_addr;
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use self::table::expand_table_addr;
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/// Perform a simple legalization by expansion of the function, without
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/// platform-specific transforms.
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pub fn simple_legalize(func: &mut ir::Function, cfg: &mut ControlFlowGraph, isa: &dyn TargetIsa) {
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let mut pos = FuncCursor::new(func);
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let func_begin = pos.position();
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pos.set_position(func_begin);
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while let Some(_block) = pos.next_block() {
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let mut prev_pos = pos.position();
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while let Some(inst) = pos.next_inst() {
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match pos.func.dfg[inst] {
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// control flow
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InstructionData::BranchIcmp {
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opcode: ir::Opcode::BrIcmp,
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cond,
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destination,
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ref args,
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} => {
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let a = args.get(0, &pos.func.dfg.value_lists).unwrap();
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let b = args.get(1, &pos.func.dfg.value_lists).unwrap();
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let block_args = args.as_slice(&pos.func.dfg.value_lists)[2..].to_vec();
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let old_block = pos.func.layout.pp_block(inst);
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pos.func.dfg.clear_results(inst);
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let icmp_res = pos.func.dfg.replace(inst).icmp(cond, a, b);
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let mut pos = FuncCursor::new(pos.func).after_inst(inst);
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pos.use_srcloc(inst);
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pos.ins().brnz(icmp_res, destination, &block_args);
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cfg.recompute_block(pos.func, destination);
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cfg.recompute_block(pos.func, old_block);
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}
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InstructionData::CondTrap {
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opcode:
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opcode @ (ir::Opcode::Trapnz | ir::Opcode::Trapz | ir::Opcode::ResumableTrapnz),
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arg,
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code,
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} => {
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expand_cond_trap(inst, &mut pos.func, cfg, opcode, arg, code);
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}
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// memory and constants
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InstructionData::UnaryGlobalValue {
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opcode: ir::Opcode::GlobalValue,
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global_value,
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} => expand_global_value(inst, &mut pos.func, isa, global_value),
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InstructionData::HeapAddr {
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opcode: ir::Opcode::HeapAddr,
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heap,
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arg,
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imm,
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} => expand_heap_addr(inst, &mut pos.func, cfg, isa, heap, arg, imm),
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InstructionData::StackLoad {
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opcode: ir::Opcode::StackLoad,
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stack_slot,
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offset,
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} => {
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let ty = pos.func.dfg.value_type(pos.func.dfg.first_result(inst));
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let addr_ty = isa.pointer_type();
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let mut pos = FuncCursor::new(pos.func).at_inst(inst);
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pos.use_srcloc(inst);
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let addr = pos.ins().stack_addr(addr_ty, stack_slot, offset);
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// Stack slots are required to be accessible and aligned.
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let mflags = MemFlags::trusted();
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pos.func.dfg.replace(inst).load(ty, mflags, addr, 0);
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}
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InstructionData::StackStore {
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opcode: ir::Opcode::StackStore,
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arg,
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stack_slot,
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offset,
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} => {
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let addr_ty = isa.pointer_type();
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let mut pos = FuncCursor::new(pos.func).at_inst(inst);
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pos.use_srcloc(inst);
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let addr = pos.ins().stack_addr(addr_ty, stack_slot, offset);
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let mut mflags = MemFlags::new();
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// Stack slots are required to be accessible and aligned.
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mflags.set_notrap();
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mflags.set_aligned();
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pos.func.dfg.replace(inst).store(mflags, arg, addr, 0);
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}
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InstructionData::TableAddr {
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opcode: ir::Opcode::TableAddr,
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table,
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arg,
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offset,
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} => expand_table_addr(inst, &mut pos.func, table, arg, offset),
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// bitops
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::BandImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).band(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::BorImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).bor(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::BxorImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).bxor(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::IaddImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).iadd(arg, imm);
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}
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// bitshifting
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::IshlImm,
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arg,
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imm,
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} => {
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let imm = pos.ins().iconst(I32, imm);
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pos.func.dfg.replace(inst).ishl(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::RotlImm,
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arg,
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imm,
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} => {
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let imm = pos.ins().iconst(I32, imm);
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pos.func.dfg.replace(inst).rotl(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::RotrImm,
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arg,
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imm,
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} => {
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let imm = pos.ins().iconst(I32, imm);
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pos.func.dfg.replace(inst).rotr(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::SshrImm,
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arg,
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imm,
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} => {
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let imm = pos.ins().iconst(I32, imm);
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pos.func.dfg.replace(inst).sshr(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::UshrImm,
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arg,
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imm,
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} => {
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let imm = pos.ins().iconst(I32, imm);
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pos.func.dfg.replace(inst).ushr(arg, imm);
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}
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// math
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::IrsubImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).isub(imm, arg); // note: arg order reversed
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::ImulImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).imul(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::SdivImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).sdiv(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::SremImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).srem(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::UdivImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).udiv(arg, imm);
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}
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::UremImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).urem(arg, imm);
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}
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// comparisons
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InstructionData::BinaryImm64 {
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opcode: ir::Opcode::IfcmpImm,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).ifcmp(arg, imm);
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}
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InstructionData::IntCompareImm {
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opcode: ir::Opcode::IcmpImm,
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cond,
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arg,
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imm,
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} => {
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let ty = pos.func.dfg.value_type(arg);
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let imm = pos.ins().iconst(ty, imm);
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pos.func.dfg.replace(inst).icmp(cond, arg, imm);
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}
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_ => {
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prev_pos = pos.position();
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continue;
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}
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}
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// Legalization implementations require fixpoint loop here.
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// TODO: fix this.
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pos.set_position(prev_pos);
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}
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}
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}
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/// Custom expansion for conditional trap instructions.
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fn expand_cond_trap(
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inst: ir::Inst,
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func: &mut ir::Function,
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cfg: &mut ControlFlowGraph,
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opcode: ir::Opcode,
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arg: ir::Value,
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code: ir::TrapCode,
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) {
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// Parse the instruction.
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let trapz = match opcode {
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ir::Opcode::Trapz => true,
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ir::Opcode::Trapnz | ir::Opcode::ResumableTrapnz => false,
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_ => panic!("Expected cond trap: {}", func.dfg.display_inst(inst)),
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};
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// Split the block after `inst`:
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//
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// trapnz arg
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// ..
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//
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// Becomes:
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//
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// brz arg, new_block_resume
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// jump new_block_trap
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//
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// new_block_trap:
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// trap
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//
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// new_block_resume:
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// ..
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let old_block = func.layout.pp_block(inst);
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let new_block_trap = func.dfg.make_block();
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let new_block_resume = func.dfg.make_block();
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// Replace trap instruction by the inverted condition.
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if trapz {
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func.dfg.replace(inst).brnz(arg, new_block_resume, &[]);
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} else {
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func.dfg.replace(inst).brz(arg, new_block_resume, &[]);
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}
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// Add jump instruction after the inverted branch.
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let mut pos = FuncCursor::new(func).after_inst(inst);
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pos.use_srcloc(inst);
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pos.ins().jump(new_block_trap, &[]);
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// Insert the new label and the unconditional trap terminator.
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pos.insert_block(new_block_trap);
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match opcode {
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ir::Opcode::Trapz | ir::Opcode::Trapnz => {
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pos.ins().trap(code);
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}
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ir::Opcode::ResumableTrapnz => {
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pos.ins().resumable_trap(code);
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pos.ins().jump(new_block_resume, &[]);
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}
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_ => unreachable!(),
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}
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// Insert the new label and resume the execution when the trap fails.
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pos.insert_block(new_block_resume);
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// Finally update the CFG.
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cfg.recompute_block(pos.func, old_block);
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cfg.recompute_block(pos.func, new_block_resume);
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cfg.recompute_block(pos.func, new_block_trap);
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}
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