e430984ac4
* Encode vselect using BLEND instructions on x86 * Legalize vselect to bitselect * Optimize bitselect to vselect for some operands * Add run tests for bitselect-vselect optimization * Address review feedback
44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
test run
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set enable_simd
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target x86_64 haswell
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function %vselect_i8x16() -> i8x16 {
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block0:
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v1 = vconst.b8x16 [false true false true false true true true true true false false false false false false]
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v2 = vconst.i8x16 [100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115]
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v3 = vconst.i8x16 [200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i8x16() == [200 101 202 103 204 105 106 107 108 109 210 211 212 213 214 215]
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function %vselect_i16x8() -> i16x8 {
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block0:
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v1 = vconst.b16x8 [false true false true false true true true]
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v2 = vconst.i16x8 [100 101 102 103 104 105 106 107]
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v3 = vconst.i16x8 [200 201 202 203 204 205 206 207]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i16x8() == [200 101 202 103 204 105 106 107]
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function %vselect_i32x4() -> i32x4 {
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block0:
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v1 = vconst.b32x4 [false true false true]
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v2 = vconst.i32x4 [100 101 102 103]
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v3 = vconst.i32x4 [200 201 202 203]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i32x4() == [200 101 202 103]
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function %vselect_i64x2() -> i64x2 {
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block0:
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v1 = vconst.b64x2 [false true]
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v2 = vconst.i64x2 [100 101]
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v3 = vconst.i64x2 [200 201]
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v4 = vselect v1, v2, v3
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return v4
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}
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; run: %vselect_i64x2() == [200 101]
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