Andrew Brown e425bfcebd Infer REX prefixes for SIMD load and store with displacement

2020-04-02 11:28:42 -07:00

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encodings.rs

Infer REX prefixes for SIMD load and store with displacement

2020-04-02 11:28:42 -07:00

instructions.rs

Fixes #1240: Add a new accessor to indicate that an opcode requires spilling all registers;

2020-03-23 12:19:28 +01:00

legalize.rs

Add x86 implementation of SIMD swizzle instruction

2020-03-06 15:49:53 -08:00

mod.rs

Add TLS support for ELF and MachO (#1174)

2020-02-25 17:50:04 -08:00

opcodes.rs

Add x86 implementation of SIMD load_extend instructions

2020-03-31 11:35:26 -07:00

recipes.rs

Infer REX prefixes for SIMD load and store with displacement

2020-04-02 11:28:42 -07:00

registers.rs

Remove FPR32; fixes #1303

2020-03-17 12:46:41 -07:00

settings.rs

Add AVX-related settings

2020-03-06 10:53:22 -08:00