7d28d586da
Rework the constant loading functions in the riscv64 backend to generate fresh temporaries instead of reusing the destination register.
87 lines
1.8 KiB
Plaintext
87 lines
1.8 KiB
Plaintext
test compile precise-output
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set unwind_info=false
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target riscv64
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function %dynamic_heap_check(i64 vmctx, i32) -> i64 {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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heap0 = dynamic gv0, bound gv1, offset_guard 0x1000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 0, 0
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return v2
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}
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; block0:
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; uext.w a6,a1
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; ld a7,0(a0)
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; addi t3,a7,0
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; add a7,a0,a6
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; ugt a5,a6,t3##ty=i64
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; li t3,0
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; selectif_spectre_guard a0,t3,a7##test=a5
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; ret
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function %static_heap_check(i64 vmctx, i32) -> i64 {
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gv0 = vmctx
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heap0 = static gv0, bound 0x1_0000, offset_guard 0x1000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 0, 0
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return v2
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}
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; block0:
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; uext.w a6,a1
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; add a5,a0,a6
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; lui a3,16
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; ugt a6,a6,a3##ty=i64
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; li a7,0
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; selectif_spectre_guard a0,a7,a5##test=a6
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; ret
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function %dynamic_heap_check_with_offset(i64 vmctx, i32) -> i64 {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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heap0 = dynamic gv0, bound gv1, offset_guard 0x1000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 16, 8
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return v2
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}
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; block0:
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; uext.w t4,a1
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; li a7,24
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; add t0,t4,a7
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; ult t1,t0,t4##ty=i64
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; trap_if t1,heap_oob
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; ld t1,0(a0)
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; add t2,a0,t4
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; addi t2,t2,16
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; ugt t4,t0,t1##ty=i64
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; li t1,0
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; selectif_spectre_guard a0,t1,t2##test=t4
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; ret
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function %static_heap_check_with_offset(i64 vmctx, i32) -> i64 {
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gv0 = vmctx
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heap0 = static gv0, bound 0x1_0000, offset_guard 0x1000, index_type i32
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block0(v0: i64, v1: i32):
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v2 = heap_addr.i64 heap0, v1, 16, 8
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return v2
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}
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; block0:
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; uext.w a7,a1
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; add t3,a0,a7
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; addi t3,t3,16
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; lui a5,16
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; addi a5,a5,4072
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; ugt t4,a7,a5##ty=i64
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; li t0,0
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; selectif_spectre_guard a0,t0,t3##test=t4
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; ret
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