Ulrich Weigand dfb1bc4d02 Trap handler changes to support s390x (#2871) ...

On s390x, SIGILL and SIGFPE are delivered with the PSW address
pointing *after* the faulting instruction, while SIGSEGV and
SIGBUS are delivered with the PSW address pointing *to* the
faulting instruction.  In order to support this, the common
code trap handler has to distinguish between those cases.

Also, enable SIGFPE on s390x (just like on x86).

2021-05-03 11:56:18 -05:00

..

macos.rs

Bring back per-thread lazy initialization (#2863)

2021-04-28 12:08:27 -05:00

unix.rs

Trap handler changes to support s390x (#2871)

2021-05-03 11:56:18 -05:00

windows.rs

More optimizations for calling into WebAssembly (#2759)

2021-03-24 11:41:33 -05:00