cb48ea406e
This PR switches the default backend on x86, for both the `cranelift-codegen` crate and for Wasmtime, to the new (`MachInst`-style, `VCode`-based) backend that has been under development and testing for some time now. The old backend is still available by default in builds with the `old-x86-backend` feature, or by requesting `BackendVariant::Legacy` from the appropriate APIs. As part of that switch, it adds some more runtime-configurable plumbing to the testing infrastructure so that tests can be run using the appropriate backend. `clif-util test` is now capable of parsing a backend selector option from filetests and instantiating the correct backend. CI has been updated so that the old x86 backend continues to run its tests, just as we used to run the new x64 backend separately. At some point, we will remove the old x86 backend entirely, once we are satisfied that the new backend has not caused any unforeseen issues and we do not need to revert.
224 lines
5.6 KiB
Plaintext
224 lines
5.6 KiB
Plaintext
test regalloc
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; Test the spiler on an ISA with few registers.
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; RV32E has 16 registers, where:
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; - %x0 is hardwired to zero.
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; - %x1 is the return address.
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; - %x2 is the stack pointer.
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; - %x3 is the global pointer.
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; - %x4 is the thread pointer.
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; - %x10-%x15 are function arguments.
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;
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; regex: V=v\d+
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; regex: WS=\s+
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target riscv32 legacy enable_e
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; In straight-line code, the first value defined is spilled.
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; That is in order:
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; 1. The argument v1.
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; 2. The link register.
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; 3. The first computed value, v2
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function %pyramid(i32) -> i32 {
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; check: ss0 = spill_slot 4
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; check: ss1 = spill_slot 4
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; check: ss2 = spill_slot 4
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; not: spill_slot
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block0(v1: i32):
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; check: block0($(rv1=$V): i32 [%x10], $(rlink=$V): i32 [%x1])
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; check: ,ss0]$WS v1 = spill $rv1
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; nextln: ,ss1]$WS $(link=$V) = spill $rlink
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; not: spill
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v2 = iadd_imm v1, 12
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; check: $(r1v2=$V) = iadd_imm
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; nextln: ,ss2]$WS v2 = spill $r1v2
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; not: spill
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v3 = iadd_imm v2, 12
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v4 = iadd_imm v3, 12
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v5 = iadd_imm v4, 12
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v6 = iadd_imm v5, 12
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v7 = iadd_imm v6, 12
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v8 = iadd_imm v7, 12
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v9 = iadd_imm v8, 12
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v10 = iadd_imm v9, 12
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v11 = iadd_imm v10, 12
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v12 = iadd_imm v11, 12
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v13 = iadd_imm v12, 12
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v14 = iadd_imm v13, 12
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v33 = iadd v13, v14
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; check: iadd v13
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v32 = iadd v33, v12
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v31 = iadd v32, v11
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v30 = iadd v31, v10
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v29 = iadd v30, v9
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v28 = iadd v29, v8
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v27 = iadd v28, v7
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v26 = iadd v27, v6
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v25 = iadd v26, v5
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v24 = iadd v25, v4
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v23 = iadd v24, v3
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v22 = iadd v23, v2
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; check: $(r2v2=$V) = fill v2
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; check: v22 = iadd v23, $r2v2
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v21 = iadd v22, v1
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; check: $(r2v1=$V) = fill v1
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; check: v21 = iadd v22, $r2v1
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; check: $(rlink2=$V) = fill $link
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return v21
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; check: return v21, $rlink2
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}
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; All values live across a call must be spilled
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function %across_call(i32) {
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fn0 = %foo(i32)
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block0(v1: i32):
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; check: v1 = spill
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call fn0(v1)
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; check: call fn0
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call fn0(v1)
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; check: fill v1
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; check: call fn0
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return
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}
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; The same value used for two function arguments.
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function %doubleuse(i32) {
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fn0 = %xx(i32, i32)
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block0(v0: i32):
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; check: $(c=$V) = copy v0
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call fn0(v0, v0)
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; check: call fn0(v0, $c)
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return
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}
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; The same value used as indirect callee and argument.
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function %doubleuse_icall1(i32) {
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sig0 = (i32) system_v
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block0(v0: i32):
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; not:copy
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call_indirect sig0, v0(v0)
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return
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}
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; The same value used as indirect callee and two arguments.
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function %doubleuse_icall2(i32) {
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sig0 = (i32, i32) system_v
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block0(v0: i32):
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; check: $(c=$V) = copy v0
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call_indirect sig0, v0(v0, v0)
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; check: call_indirect sig0, v0(v0, $c)
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return
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}
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; Two arguments on the stack.
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function %stackargs(i32, i32, i32, i32, i32, i32, i32, i32) -> i32 {
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; check: ss0 = incoming_arg 4
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; check: ss1 = incoming_arg 4, offset 4
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; not: incoming_arg
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block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32, v7: i32):
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; unordered: fill v6
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; unordered: fill v7
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v10 = iadd v6, v7
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return v10
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}
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; More block arguments than registers.
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function %blockargs(i32) -> i32 {
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block0(v1: i32):
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; check: v1 = spill
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v2 = iconst.i32 1
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jump block1(v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2)
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block1(v10: i32, v11: i32, v12: i32, v13: i32, v14: i32, v15: i32, v16: i32, v17: i32, v18: i32, v19: i32, v20: i32, v21: i32):
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v22 = iadd v10, v11
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v23 = iadd v22, v12
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v24 = iadd v23, v13
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v25 = iadd v24, v14
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v26 = iadd v25, v15
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v27 = iadd v26, v16
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v28 = iadd v27, v17
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v29 = iadd v28, v18
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v30 = iadd v29, v19
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v31 = iadd v30, v20
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v32 = iadd v31, v21
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v33 = iadd v32, v1
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return v33
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}
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; Spilling a block argument to make room for a branch operand.
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function %brargs(i32) -> i32 {
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block0(v1: i32):
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; check: v1 = spill
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v2 = iconst.i32 1
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brnz v1, block1(v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2, v2)
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jump block2
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block2:
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return v1
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block1(v10: i32, v11: i32, v12: i32, v13: i32, v14: i32, v15: i32, v16: i32, v17: i32, v18: i32, v19: i32, v20: i32, v21: i32):
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v22 = iadd v10, v11
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v23 = iadd v22, v12
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v24 = iadd v23, v13
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v25 = iadd v24, v14
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v26 = iadd v25, v15
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v27 = iadd v26, v16
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v28 = iadd v27, v17
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v29 = iadd v28, v18
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v30 = iadd v29, v19
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v31 = iadd v30, v20
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v32 = iadd v31, v21
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v33 = iadd v32, v1
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return v33
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}
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; In straight-line code, the first value defined is spilled.
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; That is in order:
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; 1. The argument v1.
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; 2. The link register.
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; 3. The first computed value, v2
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function %use_spilled_value(i32) -> i32 {
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; check: ss0 = spill_slot 4
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; check: ss1 = spill_slot 4
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; check: ss2 = spill_slot 4
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block0(v1: i32):
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; check: block0($(rv1=$V): i32 [%x10], $(rlink=$V): i32 [%x1])
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; check: ,ss0]$WS v1 = spill $rv1
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; nextln: ,ss1]$WS $(link=$V) = spill $rlink
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; not: spill
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v2 = iadd_imm v1, 12
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; check: $(r1v2=$V) = iadd_imm
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; nextln: ,ss2]$WS v2 = spill $r1v2
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v3 = iadd_imm v2, 12
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v4 = iadd_imm v3, 12
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v5 = iadd_imm v4, 12
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v6 = iadd_imm v5, 12
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v7 = iadd_imm v6, 12
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v8 = iadd_imm v7, 12
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v9 = iadd_imm v8, 12
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v10 = iadd_imm v9, 12
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v11 = iadd_imm v10, 12
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v12 = iadd_imm v11, 12
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v13 = iadd_imm v12, 12
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v14 = iadd_imm v13, 12
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; Here we have maximum register pressure, and v2 has been spilled.
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; What happens if we use it?
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v33 = iadd v2, v14
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v32 = iadd v33, v12
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v31 = iadd v32, v11
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v30 = iadd v31, v10
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v29 = iadd v30, v9
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v28 = iadd v29, v8
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v27 = iadd v28, v7
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v26 = iadd v27, v6
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v25 = iadd v26, v5
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v24 = iadd v25, v4
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v23 = iadd v24, v3
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v22 = iadd v23, v2
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v21 = iadd v22, v1
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v20 = iadd v21, v13
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v19 = iadd v20, v2
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return v21
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}
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