cb48ea406e
This PR switches the default backend on x86, for both the `cranelift-codegen` crate and for Wasmtime, to the new (`MachInst`-style, `VCode`-based) backend that has been under development and testing for some time now. The old backend is still available by default in builds with the `old-x86-backend` feature, or by requesting `BackendVariant::Legacy` from the appropriate APIs. As part of that switch, it adds some more runtime-configurable plumbing to the testing infrastructure so that tests can be run using the appropriate backend. `clif-util test` is now capable of parsing a backend selector option from filetests and instantiating the correct backend. CI has been updated so that the old x86 backend continues to run its tests, just as we used to run the new x64 backend separately. At some point, we will remove the old x86 backend entirely, once we are satisfied that the new backend has not caused any unforeseen issues and we do not need to revert.
113 lines
2.2 KiB
Plaintext
113 lines
2.2 KiB
Plaintext
test regalloc
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target x86_64 legacy haswell
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; regex: V=v\d+
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; regex: BB=block\d+
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; Filed as https://github.com/bytecodealliance/cranelift/issues/208
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;
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; The verifier complains about a branch argument that is not in the same virtual register as the
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; corresponding block argument.
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;
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; The problem was the reload pass rewriting block arguments on "brnz v9, block3(v9)"
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function %pr208(i64 vmctx [%rdi]) system_v {
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gv1 = vmctx
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gv0 = iadd_imm.i64 gv1, -8
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heap0 = static gv0, min 0, bound 0x5000, offset_guard 0x0040_0000
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sig0 = (i64 vmctx [%rdi]) -> i32 [%rax] system_v
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sig1 = (i64 vmctx [%rdi], i32 [%rsi]) system_v
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fn0 = u0:1 sig0
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fn1 = u0:3 sig1
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block0(v0: i64):
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v1 = iconst.i32 0
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v2 = call fn0(v0)
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v20 = iconst.i32 0x4ffe
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v16 = icmp uge v2, v20
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brz v16, block5
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jump block9
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block9:
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trap heap_oob
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block5:
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v17 = uextend.i64 v2
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v18 = iadd_imm.i64 v0, -8
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v19 = load.i64 v18
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v3 = iadd v19, v17
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v4 = load.i32 v3
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v21 = iconst.i32 0
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v5 = icmp eq v4, v21
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v6 = bint.i32 v5
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brnz v6, block2
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jump block3(v4)
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; check: block5:
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; check: jump block3(v4)
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; check: $(splitEdge=$BB):
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; nextln: jump block3(v9)
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block3(v7: i32):
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call fn1(v0, v7)
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v26 = iconst.i32 0x4ffe
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v22 = icmp uge v7, v26
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brz v22, block6
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jump block10
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block10:
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trap heap_oob
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block6:
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v23 = uextend.i64 v7
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v24 = iadd_imm.i64 v0, -8
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v25 = load.i64 v24
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v8 = iadd v25, v23
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v9 = load.i32 v8+56
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; check: v9 = spill
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; check: brnz $V, $splitEdge
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brnz v9, block3(v9)
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jump block4
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block4:
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jump block2
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block2:
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v10 = iconst.i32 0
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v31 = iconst.i32 0x4ffe
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v27 = icmp uge v10, v31
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brz v27, block7
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jump block11
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block11:
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trap heap_oob
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block7:
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v28 = uextend.i64 v10
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v29 = iadd_imm.i64 v0, -8
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v30 = load.i64 v29
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v11 = iadd v30, v28
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v12 = load.i32 v11+12
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call fn1(v0, v12)
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v13 = iconst.i32 0
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v36 = iconst.i32 0x4ffe
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v32 = icmp uge v13, v36
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brz v32, block8
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jump block12
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block12:
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trap heap_oob
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block8:
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v33 = uextend.i64 v13
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v34 = iadd_imm.i64 v0, -8
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v35 = load.i64 v34
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v14 = iadd v35, v33
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v15 = load.i32 v14+12
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call fn1(v0, v15)
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jump block1
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block1:
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return
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}
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