wasmtime/cranelift/filetests/filetests/isa/x86/simd-arithmetic-binemit.clif

test binemit
set enable_simd
target x86_64 skylake

function %iadd_i32x4() -> b1 {
block0:
[-, %xmm0]    v0 = vconst.i32x4 [1 1 1 1]
[-, %xmm1]    v1 = vconst.i32x4 [1 2 3 4]
[-, %xmm0]    v2 = iadd v0, v1      ; bin: 66 0f fe c1

    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 2

    v5 = extractlane v2, 3
    v6 = icmp_imm eq v5, 5

    v7 = band v4, v6
    return v7
}

function %iadd_i8x16_with_overflow() -> b1 {
block0:
[-, %xmm0]    v0 = vconst.i8x16 [255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255]
[-, %xmm7]    v1 = vconst.i8x16 [2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2]
[-, %xmm0]    v2 = iadd v0, v1      ; bin: 66 0f fc c7

    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 1

    return v4
}

function %iadd_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8 [%xmm1], v1: i16x8 [%xmm2]):
[-, %xmm1]  v2 = iadd v0, v1      ; bin: 66 0f fd ca
            return v2
}

function %iadd_i64x2(i64x2, i64x2) -> i64x2 {
block0(v0: i64x2 [%xmm3], v1: i64x2 [%xmm4]):
[-, %xmm3]  v2 = iadd v0, v1      ; bin: 66 0f d4 dc
            return v2
}

function %isub_i32x4() -> b1 {
block0:
[-, %xmm3]    v0 = vconst.i32x4 [1 1 1 1]
[-, %xmm5]    v1 = vconst.i32x4 [1 2 3 4]
[-, %xmm3]    v2 = isub v0, v1  ; bin: 66 0f fa dd

    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 0

    v5 = extractlane v2, 1
    v6 = icmp_imm eq v5, 0xffffffff

    v7 = band v4, v6
    return v7
}

function %isub_i64x2(i64x2, i64x2) -> i64x2 {
block0(v0: i64x2 [%xmm0], v1: i64x2 [%xmm1]):
[-, %xmm0]  v2 = isub v0, v1      ; bin: 66 0f fb c1
    return v2
}

function %isub_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8 [%xmm3], v1: i16x8 [%xmm4]):
[-, %xmm3]  v2 = isub v0, v1      ; bin: 66 0f f9 dc
    return v2
}

function %isub_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16 [%xmm3], v1: i8x16 [%xmm4]):
[-, %xmm3]  v2 = isub v0, v1      ; bin: 66 0f f8 dc
    return v2
}

function %imul_i32x4() -> b1 {
block0:
[-, %xmm0]    v0 = vconst.i32x4 [-1 0 1 0x80_00_00_01]
[-, %xmm1]    v1 = vconst.i32x4 [2 2 2 2]
[-, %xmm0]    v2 = imul v0, v1 ; bin: 66 0f 38 40 c1

    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, -2

    v5 = extractlane v2, 1
    v6 = icmp_imm eq v5, 0

    v7 = extractlane v2, 3
    v8 = icmp_imm eq v7, 2 ; 0x80_00_00_01 * 2 == 0x1_00_00_00_02 (and the 1 is dropped)

    v9 = band v4, v6
    v10 = band v8, v9
    return v10
}


function %imul_i16x8() -> b1 {
block0:
[-, %xmm1]    v0 = vconst.i16x8 [-1 0 1 0x7f_ff 0 0 0 0]
[-, %xmm2]    v1 = vconst.i16x8 [2 2 2 2 0 0 0 0]
[-, %xmm1]    v2 = imul v0, v1 ; bin: 66 0f d5 ca

    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 0xfffe ; 0xfffe == -2; -2 will not work here and below because v3 is
    ; being uextend-ed, not sextend-ed

    v5 = extractlane v2, 1
    v6 = icmp_imm eq v5, 0

    v7 = extractlane v2, 3
    v8 = icmp_imm eq v7, 0xfffe ; 0x7f_ff * 2 == 0xff_fe

    v9 = band v4, v6
    v10 = band v8, v9

    return v4
}


function %sadd_sat_i8x16() -> b1 {
block0:
[-, %xmm2]    v0 = vconst.i8x16 [127 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0]
[-, %xmm3]    v1 = vconst.i8x16 [1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1]

[-, %xmm2]    v2 = sadd_sat v0, v1 ; bin: 66 0f ec d3
    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 127

    return v4
}


function %uadd_sat_i16x8() -> b1 {
block0:
[-, %xmm2]    v0 = vconst.i16x8 [-1 0 0 0 0 0 0 0]
[-, %xmm3]    v1 = vconst.i16x8 [-1 1 1 1 1 1 1 1]

[-, %xmm2]    v2 = uadd_sat v0, v1 ; bin: 66 0f dd d3
    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 65535

    return v4
}


function %sub_sat_i8x16() -> b1 {
block0:
[-, %xmm2]    v0 = vconst.i8x16 [128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0] ; 128 == 0x80 == -128
[-, %xmm3]    v1 = vconst.i8x16 [1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1]

[-, %xmm2]    v2 = ssub_sat v0, v1 ; bin: 66 0f e8 d3
    v3 = extractlane v2, 0
    v4 = icmp_imm eq v3, 0x80 ; 0x80 == -128

    ; now re-use 0x80 as an unsigned 128
[-, %xmm2]    v5 = usub_sat v0, v2 ; bin: 66 0f d8 d2
    v6 = extractlane v5, 0
    v7 = icmp_imm eq v6, 0

    v8 = band v4, v7
    return v8
}


function %sub_sat_i16x8() {
block0:
[-, %xmm3]    v0 = vconst.i16x8 [0 0 0 0 0 0 0 0]
[-, %xmm5]    v1 = vconst.i16x8 [1 1 1 1 1 1 1 1]
[-, %xmm3]    v2 = ssub_sat v0, v1 ; bin: 66 0f e9 dd
[-, %xmm3]    v3 = usub_sat v0, v1 ; bin: 66 0f d9 dd
    return
}

function %float_arithmetic_f32x4(f32x4, f32x4) {
block0(v0: f32x4 [%xmm3], v1: f32x4 [%xmm5]):
[-, %xmm3]    v2 = fadd v0, v1      ; bin: 40 0f 58 dd
[-, %xmm3]    v3 = fsub v0, v1      ; bin: 40 0f 5c dd
[-, %xmm3]    v4 = fmul v0, v1      ; bin: 40 0f 59 dd
[-, %xmm3]    v5 = fdiv v0, v1      ; bin: 40 0f 5e dd
[-, %xmm3]    v6 = fmin v0, v1      ; bin: 40 0f 5d dd
[-, %xmm3]    v7 = fmax v0, v1      ; bin: 40 0f 5f dd
[-, %xmm3]    v8 = sqrt v0          ; bin: 40 0f 51 db
    return
}

function %float_arithmetic_f64x2(f64x2, f64x2) {
block0(v0: f64x2 [%xmm3], v1: f64x2 [%xmm5]):
[-, %xmm3]    v2 = fadd v0, v1      ; bin: 66 40 0f 58 dd
[-, %xmm3]    v3 = fsub v0, v1      ; bin: 66 40 0f 5c dd
[-, %xmm3]    v4 = fmul v0, v1      ; bin: 66 40 0f 59 dd
[-, %xmm3]    v5 = fdiv v0, v1      ; bin: 66 40 0f 5e dd
[-, %xmm3]    v6 = fmin v0, v1      ; bin: 66 40 0f 5d dd
[-, %xmm3]    v7 = fmax v0, v1      ; bin: 66 40 0f 5f dd
[-, %xmm3]    v8 = sqrt v0          ; bin: 66 40 0f 51 db
    return
}

function %average_rounding_i8x16(i8x16, i8x16) {
block0(v0: i8x16 [%xmm6], v1: i8x16 [%xmm2]):
[-, %xmm6]    v2 = avg_round v0, v1      ; bin: 66 0f e0 f2
    return
}

function %average_rounding_i16x8(i16x8, i16x8) {
block0(v0: i16x8 [%xmm6], v1: i16x8 [%xmm2]):
[-, %xmm6]    v2 = avg_round v0, v1      ; bin: 66 0f e3 f2
    return
}