Alex Crichton ef8ea644f4 aarch64: Migrate {s,u}{sub,add}_sat to ISLE (#3551) ...

These were pretty straightforward! Only needed a single `rule` per
instruction with a new 128-bit vector type matcher.

2021-11-19 12:59:06 -06:00

..

abi_impl.rs

Aarch64: always generate the CFA directive indicating no pointer signing

2021-09-02 09:16:34 +02:00

abi.rs

Remove unused store_stackslot/load_stackslot trait methods.

2021-07-02 18:09:33 +02:00

adapter.rs

Remove more old backend ISA concepts (#3402)

2021-10-04 10:36:12 +02:00

blockorder.rs

cranelift: Move most debug-level logs to the trace level

2021-07-26 11:50:16 -07:00

buffer.rs

Disable check_label_branch_invariants in fuzzing

2021-11-15 07:34:09 -08:00

compile.rs

cranelift: Move most debug-level logs to the trace level

2021-07-26 11:50:16 -07:00

debug.rs

Address review comments.

2021-01-22 16:02:29 -08:00

helpers.rs

x86-64 Windows fastcall ABI support.

2021-03-03 19:53:18 -08:00

inst_common.rs

More atomic ops

2021-02-18 14:16:15 +01:00

isle.rs

aarch64: Migrate {s,u}{sub,add}_sat to ISLE (#3551)

2021-11-19 12:59:06 -06:00

lower.rs

aarch64: Migrate iadd and isub to ISLE

2021-11-19 06:51:38 -08:00

mod.rs

aarch64: Initial work to transition backend to ISLE (#3541)

2021-11-18 10:38:16 -06:00

regmapping.rs

aarch64: Initial work to transition backend to ISLE (#3541)

2021-11-18 10:38:16 -06:00

valueregs.rs

x86-64 Windows fastcall ABI support.

2021-03-03 19:53:18 -08:00

vcode.rs

Use relative call instructions between wasm functions (#3275)

2021-09-01 13:27:38 -05:00