Benjamin Bouvier d3acd9a283 cranelift x64: use the LZCNT instruction for Clz when it's available;

2021-01-29 19:41:01 +01:00

..

amode-opt.clif

x64 regalloc register order: put caller-saves (volatiles) first.

2020-12-06 22:37:43 -08:00

b1.clif

x64: handle tests of b1 values correctly (only LSB is defined).

2021-01-05 14:45:46 -08:00

basic.clif

machinst x64: enable clif testing

2020-09-25 11:12:21 +02:00

bitops-i128-run.clif

x64 backend: implement 128-bit ops and misc fixes.

2021-01-14 13:45:50 -08:00

bitrev-i128-run.clif

x64 backend: implement 128-bit ops and misc fixes.

2021-01-14 13:45:50 -08:00

branches.clif

Add support for brff/brif and icmp_sp to new x64 backend to support Lucet.

2020-11-11 13:43:39 -08:00

clz-lzcnt.clif

cranelift x64: use the LZCNT instruction for Clz when it's available;

2021-01-29 19:41:01 +01:00

cmp-mem-bug.clif

x64 bugfix: prevent load-op fusion of cmp because it could be emitted multiple times.

2021-01-13 09:48:51 -08:00

floating-point.clif

x64 backend: implement 128-bit ops and misc fixes.

2021-01-14 13:45:50 -08:00

heap.clif

x64 regalloc register order: put caller-saves (volatiles) first.

2020-12-06 22:37:43 -08:00

i128.clif

x64 and aarch64: allow StructArgument and StructReturn args.

2021-01-17 23:11:45 -08:00

icmp-i128-run.clif

Add i128.icmp run tests for the x64 backend.

2021-01-25 13:02:21 -08:00

load-op.clif

machinst lowering: update inst color when scanning across branch to allow more load-op merging.

2021-01-11 11:20:44 -08:00

move-elision.clif

[machinst x64]: demonstrate that packed register moves are elided

2020-09-29 08:48:37 -07:00

popcnt.clif

x64 lowering fix: i32.popcnt should not merge load and make it 64-bit.

2020-12-08 12:24:34 -08:00

probestack.clif

Two Lucet-related fixes to stack overflow handling.

2020-12-07 16:08:53 -08:00

run-const.clif

machinst x64: enable clif testing

2020-09-25 11:12:21 +02:00

select-i128.clif

x64 backend: implement 128-bit ops and misc fixes.

2021-01-14 13:45:50 -08:00

shift-i128-run.clif

x64 backend: implement 128-bit ops and misc fixes.

2021-01-14 13:45:50 -08:00

simd-arithmetic-run.clif

[machinst x64]: enable packed saturated arithmetic

2020-10-08 08:46:20 -07:00

simd-bitwise-compile.clif

x64 regalloc register order: put caller-saves (volatiles) first.

2020-12-06 22:37:43 -08:00

simd-bitwise-run.clif

[machinst x64]: implement packed shifts

2020-11-12 14:21:45 -08:00

simd-comparison-legalize.clif

[machinst x64]: port CLIF tests related to comparison and lane operations

2020-10-02 08:29:31 -07:00

simd-comparison-run.clif

[machinst x64]: port CLIF tests related to comparison and lane operations

2020-10-02 08:29:31 -07:00

simd-conversion-run.clif

Add filetests for fcvt_from_sint.f32x4

2020-10-28 13:02:50 -07:00

simd-lane-access-compile.clif

[machinst x64]: implement load*_zero for x64

2021-01-08 16:21:57 -08:00

simd-lane-access-run.clif

[machinst x64]: port CLIF tests related to comparison and lane operations

2020-10-02 08:29:31 -07:00

simd-logical-compile.clif

x64 regalloc register order: put caller-saves (volatiles) first.

2020-12-06 22:37:43 -08:00

simd-logical-run.clif

[machinst x64]: port more CLIF filetests

2020-10-09 10:04:50 -07:00

struct-arg.clif

x64 and aarch64: allow StructArgument and StructReturn args.

2021-01-17 23:11:45 -08:00

struct-ret.clif

x64 and aarch64: allow StructArgument and StructReturn args.

2021-01-17 23:11:45 -08:00

tls_elf.clif

Add ELF TLS support in new x64 backend.

2021-01-17 22:48:51 -08:00

uextend-elision.clif

machinst x64: avoid emitting movzx when the input is an ALU 32-bits operation;

2020-10-09 18:49:27 +02:00