Jakob Stoklund Olesen a1cbeb7f7a Add encodings for imul instructions to RISC-V. ...

This is just the basic 'imul' the M instruction set also has mulh/mulhu which
yield the high bits of a multiplication, and there are div/rem instructions to
be implemented.

These instructions are gated by the use_m predicate, but ISA predicates are not
completely implemented yet.

2016-08-30 16:16:28 -07:00

..

riscv

Add encodings for imul instructions to RISC-V.

2016-08-30 16:16:28 -07:00

__init__.py

Python 3 compat.

2016-08-23 16:35:58 -07:00