cdecc858b4
Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
25 lines
635 B
Plaintext
25 lines
635 B
Plaintext
test interpret
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test run
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target x86_64
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target s390x
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target aarch64
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target riscv64
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; Store a value in the heap using `heap_addr` and load it using `global_value`
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function %store_load(i64 vmctx, i64, i32) -> i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0+0
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heap0 = static gv1, min 0x1000, bound 0x1_0000_0000, offset_guard 0, index_type i64
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block0(v0: i64, v1: i64, v2: i32):
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v3 = heap_addr.i64 heap0, v1, 0
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store.i32 v2, v3
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v4 = global_value.i64 gv1
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v5 = load.i32 v4
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return v5
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}
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; heap: static, size=0x1000, ptr=vmctx+0, bound=vmctx+8
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; run: %store_load(0, 1) == 1
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; run: %store_load(0, -1) == -1
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