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wasmtime/cranelift/filetests/filetests/runtests/fdiv.clif
yuyang-ok cdecc858b4 add riscv64 backend for cranelift. (#4271)
Add a RISC-V 64 (`riscv64`, RV64GC) backend.

Co-authored-by: yuyang <756445638@qq.com>
Co-authored-by: Chris Fallin <chris@cfallin.org>
Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
2022-09-27 17:30:31 -07:00

172 lines
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test interpret
test run
target x86_64
target aarch64
target s390x
target riscv64
function %fdiv_f32(f32, f32) -> f32 {
block0(v0: f32, v1: f32):
v2 = fdiv v0, v1
return v2
}
; run: %fdiv_f32(0x0.5, 0x1.0) == 0x1.4p-2
; run: %fdiv_f32(0x1.5, 0x2.9) == 0x1.063e70p-1
; run: %fdiv_f32(0x1.1p10, 0x1.4p1) == 0x1.b33334p8
; run: %fdiv_f32(0x1.4cccccp0, 0x1.8p0) == 0x1.bbbbbap-1
; run: %fdiv_f32(0x1.b33334p0, 0x1.99999ap-2) == 0x1.1p2
; run: %fdiv_f32(0x1.333334p-1, 0x1.666666p1) == 0x1.b6db70p-3
; run: %fdiv_f32(-0x0.5, -0x1.0) == 0x1.4p-2
; run: %fdiv_f32(-0x1.5, -0x2.9) == 0x1.063e70p-1
; run: %fdiv_f32(-0x1.1p10, -0x1.333334p-1) == 0x1.c55554p10
; run: %fdiv_f32(-0x1.99999ap-2, -0x1.4cccccp0) == 0x1.3b13b2p-2
; run: %fdiv_f32(-0x1.8p0, -0x1.b33334p0) == 0x1.c3c3c2p-1
; run: %fdiv_f32(-0x1.4p1, -0x1.666666p1) == 0x1.c92492p-1
; run: %fdiv_f32(0x0.5, -0x1.0) == -0x1.4p-2
; run: %fdiv_f32(0x1.b33334p0, -0x1.b33334p0) == -0x1.0p0
; run: %fdiv_f32(0x0.5, 0x0.0) == +Inf
; run: %fdiv_f32(0x1.5, -0x0.0) == -Inf
; run: %fdiv_f32(0x1.1p10, 0x0.0) == +Inf
; run: %fdiv_f32(0x1.4cccccp0, -0x0.0) == -Inf
; run: %fdiv_f32(-0x0.5, 0x0.0) == -Inf
; run: %fdiv_f32(-0x1.5, -0x0.0) == +Inf
; run: %fdiv_f32(-0x1.1p10, 0x0.0) == -Inf
; run: %fdiv_f32(-0x1.4cccccp0, -0x0.0) == +Inf
; F32 Epsilon / Max / Min Positive
; run: %fdiv_f32(0x1.0p-23, 0x1.fffffep127) == 0x0.0
; run: %fdiv_f32(0x1.0p-23, 0x1.0p-126) == 0x1.0p103
; run: %fdiv_f32(0x1.fffffep127, 0x1.fffffep127) == 0x1.0
; run: %fdiv_f32(0x1.0p-126, 0x1.fffffep127) == 0x0.0
; run: %fdiv_f32(0x1.0p-126, 0x1.0p-126) == 0x1.0
; Specials
; run: %fdiv_f32(0x0.0, -Inf) == -0x0.0
; run: %fdiv_f32(0x0.0, -0x1.0) == -0x0.0
; run: %fdiv_f32(0x0.0, +Inf) == 0x0.0
; run: %fdiv_f32(0x0.0, 0x1.0) == 0x0.0
; run: %fdiv_f32(-0x0.0, -Inf) == 0x0.0
; run: %fdiv_f32(-0x0.0, -0x1.0) == 0x0.0
; run: %fdiv_f32(-0x0.0, +Inf) == -0x0.0
; run: %fdiv_f32(-0x0.0, 0x1.0) == -0x0.0
; run: %fdiv_f32(Inf, -0x1.0) == -Inf
; run: %fdiv_f32(Inf, 0x1.0) == +Inf
; run: %fdiv_f32(-Inf, -0x1.0) == +Inf
; F32 Subnormals
; run: %fdiv_f32(0x0.8p-126, -0x0.800002p-126) == -0x1.fffff8p-1
; run: %fdiv_f32(0x0.8p-126, 0x1.0) == 0x0.8p-126
; run: %fdiv_f32(-0x0.800002p-126, 0x1.0) == -0x0.800002p-126
; F32 NaN's
; For NaN's this operation is specified as producing a value that is a NaN
function %fdiv_is_nan_f32(f32, f32) -> i32 {
block0(v0: f32, v1: f32):
v2 = fdiv v0, v1
v3 = fcmp ne v2, v2
v4 = bint.i32 v3
return v4
}
; run: %fdiv_is_nan_f32(0x0.0, -0x0.0) == 1
; run: %fdiv_is_nan_f32(-0x0.0, 0x0.0) == 1
; run: %fdiv_is_nan_f32(+Inf, +Inf) == 1
; run: %fdiv_is_nan_f32(-Inf, -Inf) == 1
; run: %fdiv_is_nan_f32(+Inf, -Inf) == 1
; run: %fdiv_is_nan_f32(-Inf, +Inf) == 1
; run: %fdiv_is_nan_f32(0x0.0, +NaN) == 1
; run: %fdiv_is_nan_f32(-NaN, 0x0.0) == 1
; run: %fdiv_is_nan_f32(0x0.0, +NaN:0x0) == 1
; run: %fdiv_is_nan_f32(+NaN:0x1, 0x0.0) == 1
; run: %fdiv_is_nan_f32(0x0.0, +NaN:0x300001) == 1
; run: %fdiv_is_nan_f32(-NaN:0x0, 0x0.0) == 1
; run: %fdiv_is_nan_f32(0x0.0, -NaN:0x1) == 1
; run: %fdiv_is_nan_f32(-NaN:0x300001, 0x0.0) == 1
; run: %fdiv_is_nan_f32(0x0.0, +sNaN:0x1) == 1
; run: %fdiv_is_nan_f32(-sNaN:0x1, 0x0.0) == 1
; run: %fdiv_is_nan_f32(0x0.0, +sNaN:0x200001) == 1
; run: %fdiv_is_nan_f32(-sNaN:0x200001, 0x0.0) == 1
function %fdiv_f64(f64, f64) -> f64 {
block0(v0: f64, v1: f64):
v2 = fdiv v0, v1
return v2
}
; run: %fdiv_f64(0x0.5, 0x1.0) == 0x1.4p-2
; run: %fdiv_f64(0x1.5, 0x2.9) == 0x1.063e7063e7064p-1
; run: %fdiv_f64(0x1.1p10, 0x1.4p1) == 0x1.b333333333333p8
; run: %fdiv_f64(0x1.4cccccccccccdp0, 0x1.8p0) == 0x1.bbbbbbbbbbbbcp-1
; run: %fdiv_f64(0x1.b333333333333p0, 0x1.999999999999ap-2) == 0x1.1p2
; run: %fdiv_f64(0x1.3333333333333p-1, 0x1.6666666666666p1) == 0x1.b6db6db6db6dcp-3
; run: %fdiv_f64(-0x0.5, -0x1.0) == 0x1.4p-2
; run: %fdiv_f64(-0x1.5, -0x2.9) == 0x1.063e7063e7064p-1
; run: %fdiv_f64(-0x1.1p10, -0x1.3333333333333p-1) == 0x1.c555555555556p10
; run: %fdiv_f64(-0x1.999999999999ap-2, -0x1.4cccccccccccdp0) == 0x1.3b13b13b13b14p-2
; run: %fdiv_f64(-0x1.8p0, -0x1.b333333333333p0) == 0x1.c3c3c3c3c3c3cp-1
; run: %fdiv_f64(-0x1.4p1, -0x1.6666666666666p1) == 0x1.c924924924925p-1
; run: %fdiv_f64(0x0.5, -0x1.0) == -0x1.4p-2
; run: %fdiv_f64(0x1.b333333333333p0, -0x1.b333333333333p0) == -0x1.0
; run: %fdiv_f64(0x0.5, 0x0.0) == +Inf
; run: %fdiv_f64(0x1.5, -0x0.0) == -Inf
; run: %fdiv_f64(0x1.1p10, 0x0.0) == +Inf
; run: %fdiv_f64(0x1.4cccccccccccdp0, -0x0.0) == -Inf
; run: %fdiv_f64(-0x0.5, 0x0.0) == -Inf
; run: %fdiv_f64(-0x1.5, -0x0.0) == +Inf
; run: %fdiv_f64(-0x1.1p10, 0x0.0) == -Inf
; run: %fdiv_f64(-0x1.4cccccccccccdp0, -0x0.0) == +Inf
; Specials
; run: %fdiv_f64(0x0.0, -Inf) == -0x0.0
; run: %fdiv_f64(0x0.0, -0x1.0) == -0x0.0
; run: %fdiv_f64(0x0.0, +Inf) == 0x0.0
; run: %fdiv_f64(0x0.0, 0x1.0) == 0x0.0
; run: %fdiv_f64(-0x0.0, -Inf) == 0x0.0
; run: %fdiv_f64(-0x0.0, -0x1.0) == 0x0.0
; run: %fdiv_f64(-0x0.0, +Inf) == -0x0.0
; run: %fdiv_f64(-0x0.0, 0x1.0) == -0x0.0
; run: %fdiv_f64(Inf, -0x1.0) == -Inf
; run: %fdiv_f64(Inf, 0x1.0) == +Inf
; run: %fdiv_f64(-Inf, -0x1.0) == +Inf
; F64 Epsilon / Max / Min Positive
; run: %fdiv_f64(0x1.0p-52, 0x1.fffffffffffffp1023) == 0x0.0
; run: %fdiv_f64(0x1.0p-52, 0x1.0p-1022) == 0x1.0p970
; run: %fdiv_f64(0x1.fffffffffffffp1023, 0x1.fffffffffffffp1023) == 0x1.0
; run: %fdiv_f64(0x1.0p-1022, 0x1.fffffffffffffp1023) == 0x0.0
; run: %fdiv_f64(0x1.0p-1022, 0x1.0p-1022) == 0x1.0
; F64 Subnormals
; run: %fdiv_f64(0x0.8p-1022, -0x0.8p-1022) == -0x1.0
; run: %fdiv_f64(0x0.8p-1022, 0x1.0) == 0x0.8p-1022
; run: %fdiv_f64(-0x0.8p-1022, 0x1.0) == -0x0.8p-1022
; F64 NaN's
; For NaN's this operation is specified as producing a value that is a NaN
function %fdiv_is_nan_f64(f64, f64) -> i32 {
block0(v0: f64, v1: f64):
v2 = fdiv v0, v1
v3 = fcmp ne v2, v2
v4 = bint.i32 v3
return v4
}
; run: %fdiv_is_nan_f64(0x0.0, -0x0.0) == 1
; run: %fdiv_is_nan_f64(-0x0.0, 0x0.0) == 1
; run: %fdiv_is_nan_f64(+Inf, +Inf) == 1
; run: %fdiv_is_nan_f64(-Inf, -Inf) == 1
; run: %fdiv_is_nan_f64(+Inf, -Inf) == 1
; run: %fdiv_is_nan_f64(-Inf, +Inf) == 1
; run: %fdiv_is_nan_f64(0x0.0, +NaN) == 1
; run: %fdiv_is_nan_f64(-NaN, 0x0.0) == 1
; run: %fdiv_is_nan_f64(0x0.0, +NaN:0x0) == 1
; run: %fdiv_is_nan_f64(+NaN:0x1, 0x0.0) == 1
; run: %fdiv_is_nan_f64(0x0.0, +NaN:0x4000000000001) == 1
; run: %fdiv_is_nan_f64(-NaN:0x0, 0x0.0) == 1
; run: %fdiv_is_nan_f64(0x0.0, -NaN:0x1) == 1
; run: %fdiv_is_nan_f64(-NaN:0x4000000000001, 0x0.0) == 1
; run: %fdiv_is_nan_f64(0x0.0, +sNaN:0x1) == 1
; run: %fdiv_is_nan_f64(-sNaN:0x1, 0x0.0) == 1
; run: %fdiv_is_nan_f64(0x0.0, +sNaN:0x4000000000001) == 1
; run: %fdiv_is_nan_f64(-sNaN:0x4000000000001, 0x0.0) == 1