cdecc858b4
Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
95 lines
3.1 KiB
Plaintext
95 lines
3.1 KiB
Plaintext
test interpret
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test run
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target aarch64
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target x86_64
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target s390x
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target riscv64
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function %fabs_f32(f32) -> f32 {
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block0(v0: f32):
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v1 = fabs v0
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return v1
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}
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; run: %fabs_f32(0x9.0) == 0x9.0
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; run: %fabs_f32(-0x9.0) == 0x9.0
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; run: %fabs_f32(0x0.0) == 0x0.0
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; run: %fabs_f32(-0x0.0) == 0x0.0
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; F32 Inf
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; run: %fabs_f32(Inf) == Inf
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; run: %fabs_f32(-Inf) == +Inf
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; F32 Epsilon / Max / Min Positive
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; run: %fabs_f32(0x1.000000p-23) == 0x1.000000p-23
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; run: %fabs_f32(-0x1.000000p-23) == 0x1.000000p-23
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; run: %fabs_f32(0x1.fffffep127) == 0x1.fffffep127
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; run: %fabs_f32(-0x1.fffffep127) == 0x1.fffffep127
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; run: %fabs_f32(0x1.000000p-126) == 0x1.000000p-126
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; run: %fabs_f32(-0x1.000000p-126) == 0x1.000000p-126
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; F32 Subnormals
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; run: %fabs_f32(0x0.800000p-126) == 0x0.800000p-126
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; run: %fabs_f32(-0x0.800000p-126) == 0x0.800000p-126
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; run: %fabs_f32(0x0.000002p-126) == 0x0.000002p-126
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; run: %fabs_f32(-0x0.000002p-126) == 0x0.000002p-126
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; F32 NaN's
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; Unlike with other operations fabs is guaranteed to only affect the sign bit
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; run: %fabs_f32(+NaN) == +NaN
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; run: %fabs_f32(-NaN) == +NaN
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; run: %fabs_f32(+NaN:0x0) == +NaN:0x0
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; run: %fabs_f32(+NaN:0x1) == +NaN:0x1
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; run: %fabs_f32(+NaN:0x300001) == +NaN:0x300001
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; run: %fabs_f32(-NaN:0x0) == +NaN:0x0
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; run: %fabs_f32(-NaN:0x1) == +NaN:0x1
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; run: %fabs_f32(-NaN:0x300001) == +NaN:0x300001
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; run: %fabs_f32(+sNaN:0x1) == +sNaN:0x1
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; run: %fabs_f32(-sNaN:0x1) == +sNaN:0x1
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; run: %fabs_f32(+sNaN:0x200001) == +sNaN:0x200001
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; run: %fabs_f32(-sNaN:0x200001) == +sNaN:0x200001
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function %fabs_f64(f64) -> f64 {
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block0(v0: f64):
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v1 = fabs v0
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return v1
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}
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; run: %fabs_f64(0x9.0) == 0x9.0
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; run: %fabs_f64(-0x9.0) == 0x9.0
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; run: %fabs_f64(0x0.0) == 0x0.0
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; run: %fabs_f64(-0x0.0) == 0x0.0
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; F64 Inf
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; run: %fabs_f64(Inf) == Inf
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; run: %fabs_f64(-Inf) == +Inf
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; F64 Epsilon / Max / Min Positive
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; run: %fabs_f64(0x1.0000000000000p-52) == 0x1.0000000000000p-52
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; run: %fabs_f64(-0x1.0000000000000p-52) == 0x1.0000000000000p-52
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; run: %fabs_f64(0x1.fffffffffffffp1023) == 0x1.fffffffffffffp1023
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; run: %fabs_f64(-0x1.fffffffffffffp1023) == 0x1.fffffffffffffp1023
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; run: %fabs_f64(0x1.0000000000000p-1022) == 0x1.0000000000000p-1022
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; run: %fabs_f64(-0x1.0000000000000p-1022) == 0x1.0000000000000p-1022
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; F64 Subnormals
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; run: %fabs_f64(0x0.8000000000000p-1022) == 0x0.8000000000000p-1022
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; run: %fabs_f64(-0x0.8000000000000p-1022) == 0x0.8000000000000p-1022
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; run: %fabs_f64(0x0.0000000000001p-1022) == 0x0.0000000000001p-1022
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; run: %fabs_f64(-0x0.0000000000001p-1022) == 0x0.0000000000001p-1022
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; F64 NaN's
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; Unlike with other operations fabs is guaranteed to only affect the sign bit
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; run: %fabs_f64(+NaN) == +NaN
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; run: %fabs_f64(-NaN) == +NaN
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; run: %fabs_f64(+NaN:0x0) == +NaN:0x0
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; run: %fabs_f64(+NaN:0x1) == +NaN:0x1
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; run: %fabs_f64(+NaN:0x4000000000001) == +NaN:0x4000000000001
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; run: %fabs_f64(-NaN:0x0) == +NaN:0x0
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; run: %fabs_f64(-NaN:0x1) == +NaN:0x1
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; run: %fabs_f64(-NaN:0x4000000000001) == +NaN:0x4000000000001
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; run: %fabs_f64(+sNaN:0x1) == +sNaN:0x1
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; run: %fabs_f64(-sNaN:0x1) == +sNaN:0x1
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; run: %fabs_f64(+sNaN:0x4000000000001) == +sNaN:0x4000000000001
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; run: %fabs_f64(-sNaN:0x4000000000001) == +sNaN:0x4000000000001
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