cc073593a4
As a follow-up to #5780, disassemble the regions identified by bb_starts, falling back on disassembling the whole buffer. This ensures that instructions like br_table that introduce a lot of constants don't throw off capstone for the remainder of the function. --------- Co-authored-by: Jamey Sharp <jamey@minilop.net>
1994 lines
38 KiB
Plaintext
1994 lines
38 KiB
Plaintext
test compile precise-output
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set enable_llvm_abi_extensions=true
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target x86_64
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function %f0(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = iadd v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; addq %rax, %rdx, %rax
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; movq %rsi, %rdx
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; adcq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; addq %rdx, %rax
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; movq %rsi, %rdx
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; adcq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f1(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = isub v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; subq %rax, %rdx, %rax
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; movq %rsi, %rdx
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; sbbq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; subq %rdx, %rax
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; movq %rsi, %rdx
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; sbbq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f2(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = band v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; andq %rax, %rdx, %rax
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; movq %rsi, %rdx
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; andq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; andq %rdx, %rax
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; movq %rsi, %rdx
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; andq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f3(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = bor v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; orq %rax, %rdx, %rax
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; movq %rsi, %rdx
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; orq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; orq %rdx, %rax
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; movq %rsi, %rdx
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; orq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f4(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = bxor v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; xorq %rax, %rdx, %rax
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; movq %rsi, %rdx
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; xorq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; xorq %rdx, %rax
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; movq %rsi, %rdx
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; xorq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f5(i128) -> i128 {
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block0(v0: i128):
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v1 = bnot v0
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return v1
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdi, %rax
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; notq %rax, %rax
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; movq %rsi, %rdx
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; notq %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdi, %rax
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; notq %rax
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; movq %rsi, %rdx
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; notq %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f6(i128, i128) -> i128 {
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block0(v0: i128, v1: i128):
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v2 = imul v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdx, %rax
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; movq %rdi, %rdx
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; imulq %rdx, %rcx, %rdx
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; movq %rax, %rcx
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; movq %rdi, %rax
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; movq %rsi, %r10
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; imulq %r10, %rcx, %r10
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; addq %rdx, %r10, %rdx
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; movq %rdx, %r9
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; mul %rax, %rcx, %rax, %rdx
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; movq %rdx, %rcx
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; movq %r9, %rdx
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; addq %rdx, %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdx, %rax
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; movq %rdi, %rdx
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; imulq %rcx, %rdx
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; movq %rax, %rcx
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; movq %rdi, %rax
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; movq %rsi, %r10
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; imulq %rcx, %r10
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; addq %r10, %rdx
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; movq %rdx, %r9
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; mulq %rcx
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; movq %rdx, %rcx
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; movq %r9, %rdx
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; addq %rcx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f7(i64, i64) -> i128 {
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block0(v0: i64, v1: i64):
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v2 = iconcat.i64 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rdx
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; movq %rdi, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rdx
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; movq %rdi, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f8(i128) -> i64, i64 {
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block0(v0: i128):
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v1, v2 = isplit.i128 v0
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return v1, v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rdx
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; movq %rdi, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rdx
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; movq %rdi, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %f9(i128, i128) -> i8 {
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block0(v0: i128, v1: i128):
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v2 = icmp eq v0, v1
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v3 = icmp ne v0, v1
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v4 = icmp slt v0, v1
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v5 = icmp sle v0, v1
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v6 = icmp sgt v0, v1
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v7 = icmp sge v0, v1
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v8 = icmp ult v0, v1
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v9 = icmp ule v0, v1
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v10 = icmp ugt v0, v1
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v11 = icmp uge v0, v1
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v12 = band v2, v3
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v13 = band v4, v5
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v14 = band v6, v7
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v15 = band v8, v9
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v16 = band v10, v11
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v17 = band v12, v13
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v18 = band v14, v15
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v19 = band v17, v18
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v20 = band v19, v16
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return v20
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; subq %rsp, $64, %rsp
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; movq %rbx, 16(%rsp)
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; movq %r12, 24(%rsp)
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; movq %r13, 32(%rsp)
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; movq %r14, 40(%rsp)
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; movq %r15, 48(%rsp)
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; block0:
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; cmpq %rdx, %rdi
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; setz %r9b
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; cmpq %rcx, %rsi
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; setz %r10b
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; andq %r9, %r10, %r9
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; testq $1, %r9
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; setnz %al
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; cmpq %rdx, %rdi
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; setnz %r8b
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; cmpq %rcx, %rsi
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; setnz %r9b
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; orq %r8, %r9, %r8
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; testq $1, %r8
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; setnz %r9b
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; movq %r9, rsp(0 + virtual offset)
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; cmpq %rcx, %rsi
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; setl %r8b
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; setz %r10b
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; cmpq %rdx, %rdi
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; setb %r11b
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; andq %r10, %r11, %r10
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; orq %r8, %r10, %r8
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; testq $1, %r8
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; setnz %r10b
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; cmpq %rcx, %rsi
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; setl %r11b
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; setz %r8b
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; cmpq %rdx, %rdi
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; setbe %r15b
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; andq %r8, %r15, %r8
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; orq %r11, %r8, %r11
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; testq $1, %r11
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; setnz %r8b
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; cmpq %rcx, %rsi
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; setnle %r11b
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; setz %r12b
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; cmpq %rdx, %rdi
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; setnbe %r13b
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; andq %r12, %r13, %r12
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; orq %r11, %r12, %r11
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; testq $1, %r11
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; setnz %r11b
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; cmpq %rcx, %rsi
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; setnle %r15b
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; setz %bl
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; cmpq %rdx, %rdi
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; setnb %r12b
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; andq %rbx, %r12, %rbx
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; orq %r15, %rbx, %r15
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; testq $1, %r15
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; setnz %r13b
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; cmpq %rcx, %rsi
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; setb %r14b
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; setz %r15b
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; cmpq %rdx, %rdi
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; setb %bl
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; andq %r15, %rbx, %r15
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; orq %r14, %r15, %r14
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; testq $1, %r14
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; setnz %r14b
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; cmpq %rcx, %rsi
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; setb %bl
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; setz %r12b
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; cmpq %rdx, %rdi
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; setbe %r15b
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; andq %r12, %r15, %r12
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; orq %rbx, %r12, %rbx
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; testq $1, %rbx
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; setnz %r15b
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; cmpq %rcx, %rsi
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; setnbe %bl
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; setz %r12b
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; cmpq %rdx, %rdi
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; setnbe %r9b
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; andq %r12, %r9, %r12
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; orq %rbx, %r12, %rbx
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; testq $1, %rbx
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; setnz %bl
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; cmpq %rcx, %rsi
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; setnbe %sil
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; setz %cl
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; cmpq %rdx, %rdi
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; setnb %dil
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; andq %rcx, %rdi, %rcx
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; orq %rsi, %rcx, %rsi
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; testq $1, %rsi
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; setnz %sil
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; movq rsp(0 + virtual offset), %rcx
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; andl %eax, %ecx, %eax
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; andl %r10d, %r8d, %r10d
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; andl %r11d, %r13d, %r11d
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; andl %r14d, %r15d, %r14d
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; andl %ebx, %esi, %ebx
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; andl %eax, %r10d, %eax
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; andl %r11d, %r14d, %r11d
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; andl %eax, %r11d, %eax
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; andl %eax, %ebx, %eax
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; movq 16(%rsp), %rbx
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; movq 24(%rsp), %r12
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; movq 32(%rsp), %r13
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; movq 40(%rsp), %r14
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; movq 48(%rsp), %r15
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; addq %rsp, $64, %rsp
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; subq $0x40, %rsp
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; movq %rbx, 0x10(%rsp)
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; movq %r12, 0x18(%rsp)
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; movq %r13, 0x20(%rsp)
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; movq %r14, 0x28(%rsp)
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; movq %r15, 0x30(%rsp)
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; block1: ; offset 0x21
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; cmpq %rdx, %rdi
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; sete %r9b
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; cmpq %rcx, %rsi
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; sete %r10b
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; andq %r10, %r9
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; testq $1, %r9
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; setne %al
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; cmpq %rdx, %rdi
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; setne %r8b
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; cmpq %rcx, %rsi
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; setne %r9b
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; orq %r9, %r8
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; testq $1, %r8
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; setne %r9b
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; movq %r9, (%rsp)
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; cmpq %rcx, %rsi
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; setl %r8b
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; sete %r10b
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; cmpq %rdx, %rdi
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; setb %r11b
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; andq %r11, %r10
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; orq %r10, %r8
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; testq $1, %r8
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; setne %r10b
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; cmpq %rcx, %rsi
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; setl %r11b
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; sete %r8b
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; cmpq %rdx, %rdi
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; setbe %r15b
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; andq %r15, %r8
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; orq %r8, %r11
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; testq $1, %r11
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; setne %r8b
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; cmpq %rcx, %rsi
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; setg %r11b
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; sete %r12b
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; cmpq %rdx, %rdi
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; seta %r13b
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; andq %r13, %r12
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; orq %r12, %r11
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; testq $1, %r11
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; setne %r11b
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; cmpq %rcx, %rsi
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; setg %r15b
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; sete %bl
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; cmpq %rdx, %rdi
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; setae %r12b
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; andq %r12, %rbx
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; orq %rbx, %r15
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; testq $1, %r15
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; setne %r13b
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; cmpq %rcx, %rsi
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; setb %r14b
|
|
; sete %r15b
|
|
; cmpq %rdx, %rdi
|
|
; setb %bl
|
|
; andq %rbx, %r15
|
|
; orq %r15, %r14
|
|
; testq $1, %r14
|
|
; setne %r14b
|
|
; cmpq %rcx, %rsi
|
|
; setb %bl
|
|
; sete %r12b
|
|
; cmpq %rdx, %rdi
|
|
; setbe %r15b
|
|
; andq %r15, %r12
|
|
; orq %r12, %rbx
|
|
; testq $1, %rbx
|
|
; setne %r15b
|
|
; cmpq %rcx, %rsi
|
|
; seta %bl
|
|
; sete %r12b
|
|
; cmpq %rdx, %rdi
|
|
; seta %r9b
|
|
; andq %r9, %r12
|
|
; orq %r12, %rbx
|
|
; testq $1, %rbx
|
|
; setne %bl
|
|
; cmpq %rcx, %rsi
|
|
; seta %sil
|
|
; sete %cl
|
|
; cmpq %rdx, %rdi
|
|
; setae %dil
|
|
; andq %rdi, %rcx
|
|
; orq %rcx, %rsi
|
|
; testq $1, %rsi
|
|
; setne %sil
|
|
; movq (%rsp), %rcx
|
|
; andl %ecx, %eax
|
|
; andl %r8d, %r10d
|
|
; andl %r13d, %r11d
|
|
; andl %r15d, %r14d
|
|
; andl %esi, %ebx
|
|
; andl %r10d, %eax
|
|
; andl %r14d, %r11d
|
|
; andl %r11d, %eax
|
|
; andl %ebx, %eax
|
|
; movq 0x10(%rsp), %rbx
|
|
; movq 0x18(%rsp), %r12
|
|
; movq 0x20(%rsp), %r13
|
|
; movq 0x28(%rsp), %r14
|
|
; movq 0x30(%rsp), %r15
|
|
; addq $0x40, %rsp
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f10(i128) -> i32 {
|
|
block0(v0: i128):
|
|
brif v0, block2, block1
|
|
|
|
block1:
|
|
v1 = iconst.i32 1
|
|
return v1
|
|
|
|
block2:
|
|
v2 = iconst.i32 2
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; cmpq $0, %rdi
|
|
; setz %r9b
|
|
; cmpq $0, %rsi
|
|
; setz %sil
|
|
; testb %r9b, %sil
|
|
; jz label1; j label2
|
|
; block1:
|
|
; movl $2, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
; block2:
|
|
; movl $1, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; cmpq $0, %rdi
|
|
; sete %r9b
|
|
; cmpq $0, %rsi
|
|
; sete %sil
|
|
; testb %r9b, %sil
|
|
; jne 0x27
|
|
; block2: ; offset 0x1d
|
|
; movl $2, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
; block3: ; offset 0x27
|
|
; movl $1, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f11(i128) -> i32 {
|
|
block0(v0: i128):
|
|
brif v0, block1, block2
|
|
|
|
block1:
|
|
v1 = iconst.i32 1
|
|
return v1
|
|
|
|
block2:
|
|
v2 = iconst.i32 2
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; cmpq $0, %rdi
|
|
; setz %r9b
|
|
; cmpq $0, %rsi
|
|
; setz %sil
|
|
; testb %r9b, %sil
|
|
; jz label1; j label2
|
|
; block1:
|
|
; movl $1, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
; block2:
|
|
; movl $2, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; cmpq $0, %rdi
|
|
; sete %r9b
|
|
; cmpq $0, %rsi
|
|
; sete %sil
|
|
; testb %r9b, %sil
|
|
; jne 0x27
|
|
; block2: ; offset 0x1d
|
|
; movl $1, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
; block3: ; offset 0x27
|
|
; movl $2, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f12(i64) -> i128 {
|
|
block0(v0: i64):
|
|
v1 = uextend.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f13(i64) -> i128 {
|
|
block0(v0: i64):
|
|
v1 = sextend.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rdx
|
|
; sarq $63, %rdx, %rdx
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rdx
|
|
; sarq $0x3f, %rdx
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f14(i8) -> i128 {
|
|
block0(v0: i8):
|
|
v1 = sextend.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movsbq %dil, %rax
|
|
; movq %rax, %rdx
|
|
; sarq $63, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movsbq %dil, %rax
|
|
; movq %rax, %rdx
|
|
; sarq $0x3f, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f15(i8) -> i128 {
|
|
block0(v0: i8):
|
|
v1 = uextend.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movzbq %dil, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movzbq %dil, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f16(i128) -> i64 {
|
|
block0(v0: i128):
|
|
v1 = ireduce.i64 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f17(i128) -> i8 {
|
|
block0(v0: i128):
|
|
v1 = ireduce.i8 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f18(i8) -> i128 {
|
|
block0(v0: i8):
|
|
v1 = uextend.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movzbq %dil, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movzbq %dil, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f19(i128) -> i128 {
|
|
block0(v0: i128):
|
|
v1 = popcnt.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; shrq $1, %rax, %rax
|
|
; movabsq $8608480567731124087, %r8
|
|
; andq %rax, %r8, %rax
|
|
; movq %rdi, %r9
|
|
; subq %r9, %rax, %r9
|
|
; shrq $1, %rax, %rax
|
|
; andq %rax, %r8, %rax
|
|
; subq %r9, %rax, %r9
|
|
; shrq $1, %rax, %rax
|
|
; andq %rax, %r8, %rax
|
|
; subq %r9, %rax, %r9
|
|
; movq %r9, %rax
|
|
; shrq $4, %rax, %rax
|
|
; addq %rax, %r9, %rax
|
|
; movabsq $1085102592571150095, %rdi
|
|
; andq %rax, %rdi, %rax
|
|
; movabsq $72340172838076673, %rdx
|
|
; imulq %rax, %rdx, %rax
|
|
; shrq $56, %rax, %rax
|
|
; movq %rsi, %rdi
|
|
; shrq $1, %rdi, %rdi
|
|
; movabsq $8608480567731124087, %rcx
|
|
; andq %rdi, %rcx, %rdi
|
|
; movq %rsi, %rdx
|
|
; subq %rdx, %rdi, %rdx
|
|
; shrq $1, %rdi, %rdi
|
|
; andq %rdi, %rcx, %rdi
|
|
; subq %rdx, %rdi, %rdx
|
|
; shrq $1, %rdi, %rdi
|
|
; andq %rdi, %rcx, %rdi
|
|
; subq %rdx, %rdi, %rdx
|
|
; movq %rdx, %rsi
|
|
; shrq $4, %rsi, %rsi
|
|
; addq %rsi, %rdx, %rsi
|
|
; movabsq $1085102592571150095, %r10
|
|
; andq %rsi, %r10, %rsi
|
|
; movabsq $72340172838076673, %rcx
|
|
; imulq %rsi, %rcx, %rsi
|
|
; shrq $56, %rsi, %rsi
|
|
; addq %rax, %rsi, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; shrq $1, %rax
|
|
; movabsq $0x7777777777777777, %r8
|
|
; andq %r8, %rax
|
|
; movq %rdi, %r9
|
|
; subq %rax, %r9
|
|
; shrq $1, %rax
|
|
; andq %r8, %rax
|
|
; subq %rax, %r9
|
|
; shrq $1, %rax
|
|
; andq %r8, %rax
|
|
; subq %rax, %r9
|
|
; movq %r9, %rax
|
|
; shrq $4, %rax
|
|
; addq %r9, %rax
|
|
; movabsq $0xf0f0f0f0f0f0f0f, %rdi
|
|
; andq %rdi, %rax
|
|
; movabsq $0x101010101010101, %rdx
|
|
; imulq %rdx, %rax
|
|
; shrq $0x38, %rax
|
|
; movq %rsi, %rdi
|
|
; shrq $1, %rdi
|
|
; movabsq $0x7777777777777777, %rcx
|
|
; andq %rcx, %rdi
|
|
; movq %rsi, %rdx
|
|
; subq %rdi, %rdx
|
|
; shrq $1, %rdi
|
|
; andq %rcx, %rdi
|
|
; subq %rdi, %rdx
|
|
; shrq $1, %rdi
|
|
; andq %rcx, %rdi
|
|
; subq %rdi, %rdx
|
|
; movq %rdx, %rsi
|
|
; shrq $4, %rsi
|
|
; addq %rdx, %rsi
|
|
; movabsq $0xf0f0f0f0f0f0f0f, %r10
|
|
; andq %r10, %rsi
|
|
; movabsq $0x101010101010101, %rcx
|
|
; imulq %rcx, %rsi
|
|
; shrq $0x38, %rsi
|
|
; addq %rsi, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f20(i128) -> i128 {
|
|
block0(v0: i128):
|
|
v1 = bitrev.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movabsq $6148914691236517205, %rcx
|
|
; movq %rsi, %rdx
|
|
; andq %rdx, %rcx, %rdx
|
|
; movq %rsi, %r11
|
|
; shrq $1, %r11, %r11
|
|
; andq %r11, %rcx, %r11
|
|
; shlq $1, %rdx, %rdx
|
|
; orq %rdx, %r11, %rdx
|
|
; movabsq $3689348814741910323, %r9
|
|
; movq %rdx, %r10
|
|
; andq %r10, %r9, %r10
|
|
; shrq $2, %rdx, %rdx
|
|
; andq %rdx, %r9, %rdx
|
|
; shlq $2, %r10, %r10
|
|
; orq %r10, %rdx, %r10
|
|
; movabsq $1085102592571150095, %rsi
|
|
; movq %r10, %rax
|
|
; andq %rax, %rsi, %rax
|
|
; shrq $4, %r10, %r10
|
|
; andq %r10, %rsi, %r10
|
|
; shlq $4, %rax, %rax
|
|
; orq %rax, %r10, %rax
|
|
; movabsq $71777214294589695, %rcx
|
|
; movq %rax, %rdx
|
|
; andq %rdx, %rcx, %rdx
|
|
; shrq $8, %rax, %rax
|
|
; andq %rax, %rcx, %rax
|
|
; shlq $8, %rdx, %rdx
|
|
; orq %rdx, %rax, %rdx
|
|
; movabsq $281470681808895, %r10
|
|
; movq %rdx, %r9
|
|
; andq %r9, %r10, %r9
|
|
; shrq $16, %rdx, %rdx
|
|
; andq %rdx, %r10, %rdx
|
|
; shlq $16, %r9, %r9
|
|
; orq %r9, %rdx, %r9
|
|
; movabsq $4294967295, %rsi
|
|
; movq %r9, %rax
|
|
; andq %rax, %rsi, %rax
|
|
; shrq $32, %r9, %r9
|
|
; shlq $32, %rax, %rax
|
|
; orq %rax, %r9, %rax
|
|
; movabsq $6148914691236517205, %rdx
|
|
; movq %rdi, %rcx
|
|
; andq %rcx, %rdx, %rcx
|
|
; movq %rdi, %r9
|
|
; shrq $1, %r9, %r9
|
|
; andq %r9, %rdx, %r9
|
|
; shlq $1, %rcx, %rcx
|
|
; orq %rcx, %r9, %rcx
|
|
; movabsq $3689348814741910323, %rdx
|
|
; movq %rcx, %r8
|
|
; andq %r8, %rdx, %r8
|
|
; shrq $2, %rcx, %rcx
|
|
; andq %rcx, %rdx, %rcx
|
|
; shlq $2, %r8, %r8
|
|
; orq %r8, %rcx, %r8
|
|
; movabsq $1085102592571150095, %r10
|
|
; movq %r8, %r11
|
|
; andq %r11, %r10, %r11
|
|
; shrq $4, %r8, %r8
|
|
; andq %r8, %r10, %r8
|
|
; shlq $4, %r11, %r11
|
|
; orq %r11, %r8, %r11
|
|
; movabsq $71777214294589695, %rdi
|
|
; movq %r11, %rcx
|
|
; andq %rcx, %rdi, %rcx
|
|
; shrq $8, %r11, %r11
|
|
; andq %r11, %rdi, %r11
|
|
; shlq $8, %rcx, %rcx
|
|
; orq %rcx, %r11, %rcx
|
|
; movabsq $281470681808895, %rdx
|
|
; movq %rcx, %r8
|
|
; andq %r8, %rdx, %r8
|
|
; shrq $16, %rcx, %rcx
|
|
; andq %rcx, %rdx, %rcx
|
|
; shlq $16, %r8, %r8
|
|
; orq %r8, %rcx, %r8
|
|
; movabsq $4294967295, %r10
|
|
; movq %r8, %rdx
|
|
; andq %rdx, %r10, %rdx
|
|
; shrq $32, %r8, %r8
|
|
; shlq $32, %rdx, %rdx
|
|
; orq %rdx, %r8, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movabsq $0x5555555555555555, %rcx
|
|
; movq %rsi, %rdx
|
|
; andq %rcx, %rdx
|
|
; movq %rsi, %r11
|
|
; shrq $1, %r11
|
|
; andq %rcx, %r11
|
|
; shlq $1, %rdx
|
|
; orq %r11, %rdx
|
|
; movabsq $0x3333333333333333, %r9
|
|
; movq %rdx, %r10
|
|
; andq %r9, %r10
|
|
; shrq $2, %rdx
|
|
; andq %r9, %rdx
|
|
; shlq $2, %r10
|
|
; orq %rdx, %r10
|
|
; movabsq $0xf0f0f0f0f0f0f0f, %rsi
|
|
; movq %r10, %rax
|
|
; andq %rsi, %rax
|
|
; shrq $4, %r10
|
|
; andq %rsi, %r10
|
|
; shlq $4, %rax
|
|
; orq %r10, %rax
|
|
; movabsq $0xff00ff00ff00ff, %rcx
|
|
; movq %rax, %rdx
|
|
; andq %rcx, %rdx
|
|
; shrq $8, %rax
|
|
; andq %rcx, %rax
|
|
; shlq $8, %rdx
|
|
; orq %rax, %rdx
|
|
; movabsq $0xffff0000ffff, %r10
|
|
; movq %rdx, %r9
|
|
; andq %r10, %r9
|
|
; shrq $0x10, %rdx
|
|
; andq %r10, %rdx
|
|
; shlq $0x10, %r9
|
|
; orq %rdx, %r9
|
|
; movabsq $0xffffffff, %rsi
|
|
; movq %r9, %rax
|
|
; andq %rsi, %rax
|
|
; shrq $0x20, %r9
|
|
; shlq $0x20, %rax
|
|
; orq %r9, %rax
|
|
; movabsq $0x5555555555555555, %rdx
|
|
; movq %rdi, %rcx
|
|
; andq %rdx, %rcx
|
|
; movq %rdi, %r9
|
|
; shrq $1, %r9
|
|
; andq %rdx, %r9
|
|
; shlq $1, %rcx
|
|
; orq %r9, %rcx
|
|
; movabsq $0x3333333333333333, %rdx
|
|
; movq %rcx, %r8
|
|
; andq %rdx, %r8
|
|
; shrq $2, %rcx
|
|
; andq %rdx, %rcx
|
|
; shlq $2, %r8
|
|
; orq %rcx, %r8
|
|
; movabsq $0xf0f0f0f0f0f0f0f, %r10
|
|
; movq %r8, %r11
|
|
; andq %r10, %r11
|
|
; shrq $4, %r8
|
|
; andq %r10, %r8
|
|
; shlq $4, %r11
|
|
; orq %r8, %r11
|
|
; movabsq $0xff00ff00ff00ff, %rdi
|
|
; movq %r11, %rcx
|
|
; andq %rdi, %rcx
|
|
; shrq $8, %r11
|
|
; andq %rdi, %r11
|
|
; shlq $8, %rcx
|
|
; orq %r11, %rcx
|
|
; movabsq $0xffff0000ffff, %rdx
|
|
; movq %rcx, %r8
|
|
; andq %rdx, %r8
|
|
; shrq $0x10, %rcx
|
|
; andq %rdx, %rcx
|
|
; shlq $0x10, %r8
|
|
; orq %rcx, %r8
|
|
; movabsq $0xffffffff, %r10
|
|
; movq %r8, %rdx
|
|
; andq %r10, %rdx
|
|
; shrq $0x20, %r8
|
|
; shlq $0x20, %rdx
|
|
; orq %r8, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f21(i128, i64) {
|
|
block0(v0: i128, v1: i64):
|
|
store.i128 v0, v1
|
|
return
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, 0(%rdx)
|
|
; movq %rsi, 8(%rdx)
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, (%rdx) ; trap: heap_oob
|
|
; movq %rsi, 8(%rdx) ; trap: heap_oob
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f22(i64) -> i128 {
|
|
block0(v0: i64):
|
|
v1 = load.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq 0(%rdi), %rax
|
|
; movq 8(%rdi), %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq (%rdi), %rax ; trap: heap_oob
|
|
; movq 8(%rdi), %rdx ; trap: heap_oob
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f23(i128, i8) -> i128 {
|
|
block0(v0: i128, v1: i8):
|
|
v2 = iconst.i64 0
|
|
v3 = uextend.i128 v2
|
|
brif v1, block1(v3), block2(v3)
|
|
|
|
block1(v4: i128):
|
|
v5 = iconst.i64 1
|
|
v6 = uextend.i128 v5
|
|
v7 = iadd.i128 v4, v6
|
|
return v7
|
|
|
|
block2(v8: i128):
|
|
v9 = iconst.i64 2
|
|
v10 = uextend.i128 v9
|
|
v11 = iadd.i128 v8, v10
|
|
return v11
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; xorq %rax, %rax, %rax
|
|
; xorq %r9, %r9, %r9
|
|
; testb %dl, %dl
|
|
; jnz label1; j label2
|
|
; block1:
|
|
; movl $1, %r8d
|
|
; xorq %r10, %r10, %r10
|
|
; addq %rax, %r8, %rax
|
|
; movq %r9, %rdx
|
|
; adcq %rdx, %r10, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
; block2:
|
|
; movq %r9, %rdx
|
|
; movl $2, %r9d
|
|
; xorq %r11, %r11, %r11
|
|
; addq %rax, %r9, %rax
|
|
; adcq %rdx, %r11, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; xorq %rax, %rax
|
|
; xorq %r9, %r9
|
|
; testb %dl, %dl
|
|
; je 0x29
|
|
; block2: ; offset 0x12
|
|
; movl $1, %r8d
|
|
; xorq %r10, %r10
|
|
; addq %r8, %rax
|
|
; movq %r9, %rdx
|
|
; adcq %r10, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
; block3: ; offset 0x29
|
|
; movq %r9, %rdx
|
|
; movl $2, %r9d
|
|
; xorq %r11, %r11
|
|
; addq %r9, %rax
|
|
; adcq %r11, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f24(i128, i128, i64, i128, i128, i128) -> i128 {
|
|
|
|
block0(v0: i128, v1: i128, v2: i64, v3: i128, v4: i128, v5: i128):
|
|
v6 = iadd.i128 v0, v1
|
|
v7 = uextend.i128 v2
|
|
v8 = iadd.i128 v3, v7
|
|
v9 = iadd.i128 v4, v5
|
|
v10 = iadd.i128 v6, v8
|
|
v11 = iadd.i128 v9, v10
|
|
return v11
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; subq %rsp, $32, %rsp
|
|
; movq %rbx, 0(%rsp)
|
|
; movq %r12, 8(%rsp)
|
|
; movq %r14, 16(%rsp)
|
|
; movq %r15, 24(%rsp)
|
|
; block0:
|
|
; movq %r8, %r14
|
|
; movq %rcx, %rbx
|
|
; movq %rdx, %rcx
|
|
; movq 16(%rbp), %r15
|
|
; movq 24(%rbp), %rax
|
|
; movq 32(%rbp), %rdx
|
|
; movq 40(%rbp), %r11
|
|
; movq 48(%rbp), %r10
|
|
; movq %rdi, %r8
|
|
; addq %r8, %rcx, %r8
|
|
; movq %rbx, %rdi
|
|
; movq %rsi, %rcx
|
|
; adcq %rcx, %rdi, %rcx
|
|
; xorq %rdi, %rdi, %rdi
|
|
; movq %r14, %r12
|
|
; movq %r9, %rsi
|
|
; addq %rsi, %r12, %rsi
|
|
; adcq %r15, %rdi, %r15
|
|
; addq %rax, %r11, %rax
|
|
; adcq %rdx, %r10, %rdx
|
|
; addq %r8, %rsi, %r8
|
|
; adcq %rcx, %r15, %rcx
|
|
; addq %rax, %r8, %rax
|
|
; adcq %rdx, %rcx, %rdx
|
|
; movq 0(%rsp), %rbx
|
|
; movq 8(%rsp), %r12
|
|
; movq 16(%rsp), %r14
|
|
; movq 24(%rsp), %r15
|
|
; addq %rsp, $32, %rsp
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; subq $0x20, %rsp
|
|
; movq %rbx, (%rsp)
|
|
; movq %r12, 8(%rsp)
|
|
; movq %r14, 0x10(%rsp)
|
|
; movq %r15, 0x18(%rsp)
|
|
; block1: ; offset 0x1b
|
|
; movq %r8, %r14
|
|
; movq %rcx, %rbx
|
|
; movq %rdx, %rcx
|
|
; movq 0x10(%rbp), %r15
|
|
; movq 0x18(%rbp), %rax
|
|
; movq 0x20(%rbp), %rdx
|
|
; movq 0x28(%rbp), %r11
|
|
; movq 0x30(%rbp), %r10
|
|
; movq %rdi, %r8
|
|
; addq %rcx, %r8
|
|
; movq %rbx, %rdi
|
|
; movq %rsi, %rcx
|
|
; adcq %rdi, %rcx
|
|
; xorq %rdi, %rdi
|
|
; movq %r14, %r12
|
|
; movq %r9, %rsi
|
|
; addq %r12, %rsi
|
|
; adcq %rdi, %r15
|
|
; addq %r11, %rax
|
|
; adcq %r10, %rdx
|
|
; addq %rsi, %r8
|
|
; adcq %r15, %rcx
|
|
; addq %r8, %rax
|
|
; adcq %rcx, %rdx
|
|
; movq (%rsp), %rbx
|
|
; movq 8(%rsp), %r12
|
|
; movq 0x10(%rsp), %r14
|
|
; movq 0x18(%rsp), %r15
|
|
; addq $0x20, %rsp
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f25(i128) -> i128, i128, i128, i64, i128, i128 {
|
|
block0(v0: i128):
|
|
v1 = ireduce.i64 v0
|
|
return v0, v0, v0, v1, v0, v0
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, 0(%rdx)
|
|
; movq %rsi, 8(%rdx)
|
|
; movq %rdi, 16(%rdx)
|
|
; movq %rsi, 24(%rdx)
|
|
; movq %rdi, 32(%rdx)
|
|
; movq %rdi, 40(%rdx)
|
|
; movq %rsi, 48(%rdx)
|
|
; movq %rdi, 56(%rdx)
|
|
; movq %rdi, %rax
|
|
; movq %rsi, 64(%rdx)
|
|
; movq %rsi, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, (%rdx)
|
|
; movq %rsi, 8(%rdx)
|
|
; movq %rdi, 0x10(%rdx)
|
|
; movq %rsi, 0x18(%rdx)
|
|
; movq %rdi, 0x20(%rdx)
|
|
; movq %rdi, 0x28(%rdx)
|
|
; movq %rsi, 0x30(%rdx)
|
|
; movq %rdi, 0x38(%rdx)
|
|
; movq %rdi, %rax
|
|
; movq %rsi, 0x40(%rdx)
|
|
; movq %rsi, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f26(i128, i128) -> i128, i128 {
|
|
fn0 = %g(i128, i128) -> i128, i128
|
|
block0(v0: i128, v1: i128):
|
|
v2, v3 = call fn0(v0, v1)
|
|
return v2, v3
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; subq %rsp, $16, %rsp
|
|
; movq %r13, 0(%rsp)
|
|
; block0:
|
|
; movq %r8, %r13
|
|
; subq %rsp, $16, %rsp
|
|
; virtual_sp_offset_adjust 16
|
|
; lea 0(%rsp), %r8
|
|
; load_ext_name %g+0, %r9
|
|
; call *%r9
|
|
; movq 0(%rsp), %r8
|
|
; movq 8(%rsp), %r9
|
|
; addq %rsp, $16, %rsp
|
|
; virtual_sp_offset_adjust -16
|
|
; movq %r13, %rcx
|
|
; movq %r8, 0(%rcx)
|
|
; movq %r9, 8(%rcx)
|
|
; movq 0(%rsp), %r13
|
|
; addq %rsp, $16, %rsp
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; subq $0x10, %rsp
|
|
; movq %r13, (%rsp)
|
|
; block1: ; offset 0xc
|
|
; movq %r8, %r13
|
|
; subq $0x10, %rsp
|
|
; leaq (%rsp), %r8
|
|
; movabsq $0, %r9 ; reloc_external Abs8 %g 0
|
|
; callq *%r9
|
|
; movq (%rsp), %r8
|
|
; movq 8(%rsp), %r9
|
|
; addq $0x10, %rsp
|
|
; movq %r13, %rcx
|
|
; movq %r8, (%rcx)
|
|
; movq %r9, 8(%rcx)
|
|
; movq (%rsp), %r13
|
|
; addq $0x10, %rsp
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f27(i128) -> i128 {
|
|
block0(v0: i128):
|
|
v1 = clz.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %r8
|
|
; movabsq $-1, %rcx
|
|
; bsrq %rsi, %r9
|
|
; cmovzq %rcx, %r9, %r9
|
|
; movl $63, %edi
|
|
; subq %rdi, %r9, %rdi
|
|
; movabsq $-1, %rdx
|
|
; bsrq %r8, %r10
|
|
; cmovzq %rdx, %r10, %r10
|
|
; movl $63, %eax
|
|
; subq %rax, %r10, %rax
|
|
; addq %rax, $64, %rax
|
|
; cmpq $64, %rdi
|
|
; cmovnzq %rdi, %rax, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %r8
|
|
; movq $18446744073709551615, %rcx
|
|
; bsrq %rsi, %r9
|
|
; cmoveq %rcx, %r9
|
|
; movl $0x3f, %edi
|
|
; subq %r9, %rdi
|
|
; movq $18446744073709551615, %rdx
|
|
; bsrq %r8, %r10
|
|
; cmoveq %rdx, %r10
|
|
; movl $0x3f, %eax
|
|
; subq %r10, %rax
|
|
; addq $0x40, %rax
|
|
; cmpq $0x40, %rdi
|
|
; cmovneq %rdi, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f28(i128) -> i128 {
|
|
block0(v0: i128):
|
|
v1 = ctz.i128 v0
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movl $64, %ecx
|
|
; bsfq %rdi, %rax
|
|
; cmovzq %rcx, %rax, %rax
|
|
; movl $64, %edi
|
|
; bsfq %rsi, %rdx
|
|
; cmovzq %rdi, %rdx, %rdx
|
|
; addq %rdx, $64, %rdx
|
|
; cmpq $64, %rax
|
|
; cmovzq %rdx, %rax, %rax
|
|
; xorq %rdx, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movl $0x40, %ecx
|
|
; bsfq %rdi, %rax
|
|
; cmoveq %rcx, %rax
|
|
; movl $0x40, %edi
|
|
; bsfq %rsi, %rdx
|
|
; cmoveq %rdi, %rdx
|
|
; addq $0x40, %rdx
|
|
; cmpq $0x40, %rax
|
|
; cmoveq %rdx, %rax
|
|
; xorq %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f29(i8, i128) -> i8 {
|
|
block0(v0: i8, v1: i128):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f30(i128, i128) -> i128 {
|
|
block0(v0: i128, v1: i128):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %rdx
|
|
; shlq %cl, %rdx, %rdx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11, %r11
|
|
; movq %rcx, %r10
|
|
; movl $64, %ecx
|
|
; movq %r10, %r8
|
|
; subq %rcx, %r8, %rcx
|
|
; movq %rdi, %r10
|
|
; shrq %cl, %r10, %r10
|
|
; xorq %rax, %rax, %rax
|
|
; testq $127, %r8
|
|
; cmovzq %rax, %r10, %r10
|
|
; orq %r10, %r11, %r10
|
|
; testq $64, %r8
|
|
; cmovzq %rdx, %rax, %rax
|
|
; cmovzq %r10, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %rdx
|
|
; shlq %cl, %rdx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11
|
|
; movq %rcx, %r10
|
|
; movl $0x40, %ecx
|
|
; movq %r10, %r8
|
|
; subq %r8, %rcx
|
|
; movq %rdi, %r10
|
|
; shrq %cl, %r10
|
|
; xorq %rax, %rax
|
|
; testq $0x7f, %r8
|
|
; cmoveq %rax, %r10
|
|
; orq %r11, %r10
|
|
; testq $0x40, %r8
|
|
; cmoveq %rdx, %rax
|
|
; cmoveq %r10, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f31(i128, i128) -> i128 {
|
|
block0(v0: i128, v1: i128):
|
|
v2 = ushr v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8, %r8
|
|
; movq %rsi, %r10
|
|
; shrq %cl, %r10, %r10
|
|
; movl $64, %ecx
|
|
; movq %rdx, %rdi
|
|
; subq %rcx, %rdi, %rcx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11, %r11
|
|
; xorq %rdx, %rdx, %rdx
|
|
; testq $127, %rdi
|
|
; cmovzq %rdx, %r11, %r11
|
|
; orq %r11, %r8, %r11
|
|
; testq $64, %rdi
|
|
; movq %r10, %rax
|
|
; cmovzq %r11, %rax, %rax
|
|
; cmovzq %r10, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8
|
|
; movq %rsi, %r10
|
|
; shrq %cl, %r10
|
|
; movl $0x40, %ecx
|
|
; movq %rdx, %rdi
|
|
; subq %rdi, %rcx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11
|
|
; xorq %rdx, %rdx
|
|
; testq $0x7f, %rdi
|
|
; cmoveq %rdx, %r11
|
|
; orq %r8, %r11
|
|
; testq $0x40, %rdi
|
|
; movq %r10, %rax
|
|
; cmoveq %r11, %rax
|
|
; cmoveq %r10, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f32(i128, i128) -> i128 {
|
|
block0(v0: i128, v1: i128):
|
|
v2 = sshr v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8, %r8
|
|
; movq %rsi, %r10
|
|
; sarq %cl, %r10, %r10
|
|
; movl $64, %ecx
|
|
; movq %rdx, %rax
|
|
; subq %rcx, %rax, %rcx
|
|
; movq %rsi, %r9
|
|
; shlq %cl, %r9, %r9
|
|
; xorq %r11, %r11, %r11
|
|
; testq $127, %rax
|
|
; cmovzq %r11, %r9, %r9
|
|
; orq %r8, %r9, %r8
|
|
; movq %rsi, %rdx
|
|
; sarq $63, %rdx, %rdx
|
|
; testq $64, %rax
|
|
; movq %r10, %rax
|
|
; cmovzq %r8, %rax, %rax
|
|
; cmovzq %r10, %rdx, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8
|
|
; movq %rsi, %r10
|
|
; sarq %cl, %r10
|
|
; movl $0x40, %ecx
|
|
; movq %rdx, %rax
|
|
; subq %rax, %rcx
|
|
; movq %rsi, %r9
|
|
; shlq %cl, %r9
|
|
; xorq %r11, %r11
|
|
; testq $0x7f, %rax
|
|
; cmoveq %r11, %r9
|
|
; orq %r9, %r8
|
|
; movq %rsi, %rdx
|
|
; sarq $0x3f, %rdx
|
|
; testq $0x40, %rax
|
|
; movq %r10, %rax
|
|
; cmoveq %r8, %rax
|
|
; cmoveq %r10, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f33(i128, i128) -> i128 {
|
|
block0(v0: i128, v1: i128):
|
|
v2 = rotl v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %rdx
|
|
; shlq %cl, %rdx, %rdx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11, %r11
|
|
; movq %rcx, %r8
|
|
; movl $64, %ecx
|
|
; subq %rcx, %r8, %rcx
|
|
; movq %rdi, %r10
|
|
; shrq %cl, %r10, %r10
|
|
; xorq %rax, %rax, %rax
|
|
; testq $127, %r8
|
|
; cmovzq %rax, %r10, %r10
|
|
; orq %r10, %r11, %r10
|
|
; testq $64, %r8
|
|
; cmovzq %rdx, %rax, %rax
|
|
; cmovzq %r10, %rdx, %rdx
|
|
; movl $128, %ecx
|
|
; movq %r8, %r10
|
|
; subq %rcx, %r10, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8, %r8
|
|
; movq %rsi, %r9
|
|
; shrq %cl, %r9, %r9
|
|
; movq %rcx, %r10
|
|
; movl $64, %ecx
|
|
; movq %r10, %r11
|
|
; subq %rcx, %r11, %rcx
|
|
; movq %rsi, %r10
|
|
; shlq %cl, %r10, %r10
|
|
; xorq %rsi, %rsi, %rsi
|
|
; testq $127, %r11
|
|
; cmovzq %rsi, %r10, %r10
|
|
; orq %r10, %r8, %r10
|
|
; testq $64, %r11
|
|
; movq %r9, %r8
|
|
; cmovzq %r10, %r8, %r8
|
|
; cmovzq %r9, %rsi, %rsi
|
|
; orq %rax, %r8, %rax
|
|
; orq %rdx, %rsi, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %rdx
|
|
; shlq %cl, %rdx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11
|
|
; movq %rcx, %r8
|
|
; movl $0x40, %ecx
|
|
; subq %r8, %rcx
|
|
; movq %rdi, %r10
|
|
; shrq %cl, %r10
|
|
; xorq %rax, %rax
|
|
; testq $0x7f, %r8
|
|
; cmoveq %rax, %r10
|
|
; orq %r11, %r10
|
|
; testq $0x40, %r8
|
|
; cmoveq %rdx, %rax
|
|
; cmoveq %r10, %rdx
|
|
; movl $0x80, %ecx
|
|
; movq %r8, %r10
|
|
; subq %r10, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8
|
|
; movq %rsi, %r9
|
|
; shrq %cl, %r9
|
|
; movq %rcx, %r10
|
|
; movl $0x40, %ecx
|
|
; movq %r10, %r11
|
|
; subq %r11, %rcx
|
|
; movq %rsi, %r10
|
|
; shlq %cl, %r10
|
|
; xorq %rsi, %rsi
|
|
; testq $0x7f, %r11
|
|
; cmoveq %rsi, %r10
|
|
; orq %r8, %r10
|
|
; testq $0x40, %r11
|
|
; movq %r9, %r8
|
|
; cmoveq %r10, %r8
|
|
; cmoveq %r9, %rsi
|
|
; orq %r8, %rax
|
|
; orq %rsi, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %f34(i128, i128) -> i128 {
|
|
block0(v0: i128, v1: i128):
|
|
v2 = rotr v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8, %r8
|
|
; movq %rsi, %r10
|
|
; shrq %cl, %r10, %r10
|
|
; movq %rcx, %r9
|
|
; movl $64, %ecx
|
|
; movq %r9, %rax
|
|
; subq %rcx, %rax, %rcx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11, %r11
|
|
; xorq %rdx, %rdx, %rdx
|
|
; testq $127, %rax
|
|
; cmovzq %rdx, %r11, %r11
|
|
; orq %r11, %r8, %r11
|
|
; testq $64, %rax
|
|
; movq %r10, %rax
|
|
; cmovzq %r11, %rax, %rax
|
|
; cmovzq %r10, %rdx, %rdx
|
|
; movl $128, %ecx
|
|
; movq %r9, %r10
|
|
; subq %rcx, %r10, %rcx
|
|
; movq %rdi, %r8
|
|
; shlq %cl, %r8, %r8
|
|
; movq %rsi, %r10
|
|
; shlq %cl, %r10, %r10
|
|
; movq %rcx, %r9
|
|
; movl $64, %ecx
|
|
; movq %r9, %rsi
|
|
; subq %rcx, %rsi, %rcx
|
|
; movq %rdi, %r9
|
|
; shrq %cl, %r9, %r9
|
|
; xorq %r11, %r11, %r11
|
|
; testq $127, %rsi
|
|
; cmovzq %r11, %r9, %r9
|
|
; orq %r9, %r10, %r9
|
|
; testq $64, %rsi
|
|
; cmovzq %r8, %r11, %r11
|
|
; cmovzq %r9, %r8, %r8
|
|
; orq %rax, %r11, %rax
|
|
; orq %rdx, %r8, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
|
|
; movq %rdx, %rcx
|
|
; movq %rdi, %r8
|
|
; shrq %cl, %r8
|
|
; movq %rsi, %r10
|
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; shrq %cl, %r10
|
|
; movq %rcx, %r9
|
|
; movl $0x40, %ecx
|
|
; movq %r9, %rax
|
|
; subq %rax, %rcx
|
|
; movq %rsi, %r11
|
|
; shlq %cl, %r11
|
|
; xorq %rdx, %rdx
|
|
; testq $0x7f, %rax
|
|
; cmoveq %rdx, %r11
|
|
; orq %r8, %r11
|
|
; testq $0x40, %rax
|
|
; movq %r10, %rax
|
|
; cmoveq %r11, %rax
|
|
; cmoveq %r10, %rdx
|
|
; movl $0x80, %ecx
|
|
; movq %r9, %r10
|
|
; subq %r10, %rcx
|
|
; movq %rdi, %r8
|
|
; shlq %cl, %r8
|
|
; movq %rsi, %r10
|
|
; shlq %cl, %r10
|
|
; movq %rcx, %r9
|
|
; movl $0x40, %ecx
|
|
; movq %r9, %rsi
|
|
; subq %rsi, %rcx
|
|
; movq %rdi, %r9
|
|
; shrq %cl, %r9
|
|
; xorq %r11, %r11
|
|
; testq $0x7f, %rsi
|
|
; cmoveq %r11, %r9
|
|
; orq %r10, %r9
|
|
; testq $0x40, %rsi
|
|
; cmoveq %r8, %r11
|
|
; cmoveq %r9, %r8
|
|
; orq %r11, %rax
|
|
; orq %r8, %rdx
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|