cc073593a4
As a follow-up to #5780, disassemble the regions identified by bb_starts, falling back on disassembling the whole buffer. This ensures that instructions like br_table that introduce a lot of constants don't throw off capstone for the remainder of the function. --------- Co-authored-by: Jamey Sharp <jamey@minilop.net>
324 lines
6.0 KiB
Plaintext
324 lines
6.0 KiB
Plaintext
test compile precise-output
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target s390x
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function %foo() {
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block0:
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return
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}
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; VCode:
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; block0:
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; br %r14
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function %stack_limit_leaf_zero(i64 stack_limit) {
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block0(v0: i64):
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return
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}
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; VCode:
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; block0:
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; br %r14
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function %stack_limit_gv_leaf_zero(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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gv2 = load.i64 notrap aligned gv1+4
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stack_limit = gv2
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block0(v0: i64):
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return
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}
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; VCode:
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; block0:
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; br %r14
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function %stack_limit_call_zero(i64 stack_limit) {
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fn0 = %foo()
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block0(v0: i64):
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call fn0()
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return
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}
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; VCode:
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; clgrtle %r15, %r2
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; stmg %r14, %r15, 112(%r15)
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; aghi %r15, -160
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; virtual_sp_offset_adjust 160
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; block0:
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; bras %r1, 12 ; data %foo + 0 ; lg %r4, 0(%r1)
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; basr %r14, %r4
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; lmg %r14, %r15, 272(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; clgrtle %r15, %r2 ; trap: stk_ovf
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; stmg %r14, %r15, 0x70(%r15)
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; aghi %r15, -0xa0
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; block1: ; offset 0xe
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; bras %r1, 0x1a
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; .byte 0x00, 0x00 ; reloc_external Abs8 %foo 0
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; .byte 0x00, 0x00
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; .byte 0x00, 0x00
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; .byte 0x00, 0x00
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; lg %r4, 0(%r1)
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; basr %r14, %r4
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; lmg %r14, %r15, 0x110(%r15)
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; br %r14
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function %stack_limit_gv_call_zero(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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gv2 = load.i64 notrap aligned gv1+4
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stack_limit = gv2
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fn0 = %foo()
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block0(v0: i64):
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call fn0()
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return
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}
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; VCode:
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1
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; stmg %r14, %r15, 112(%r15)
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; aghi %r15, -160
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; virtual_sp_offset_adjust 160
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; block0:
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; bras %r1, 12 ; data %foo + 0 ; lg %r4, 0(%r1)
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; basr %r14, %r4
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; lmg %r14, %r15, 272(%r15)
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; stmg %r14, %r15, 0x70(%r15)
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; aghi %r15, -0xa0
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; block1: ; offset 0x1a
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; bras %r1, 0x26
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; .byte 0x00, 0x00 ; reloc_external Abs8 %foo 0
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; .byte 0x00, 0x00
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; .byte 0x00, 0x00
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; .byte 0x00, 0x00
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; lg %r4, 0(%r1)
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; basr %r14, %r4
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; lmg %r14, %r15, 0x110(%r15)
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; br %r14
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function %stack_limit(i64 stack_limit) {
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ss0 = explicit_slot 168
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block0(v0: i64):
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return
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}
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; VCode:
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; la %r1, 168(%r2)
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; clgrtle %r15, %r1
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; aghi %r15, -168
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; block0:
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; aghi %r15, 168
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; la %r1, 0xa8(%r2)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; aghi %r15, -0xa8
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; block1: ; offset 0xc
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; aghi %r15, 0xa8
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; br %r14
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function %large_stack_limit(i64 stack_limit) {
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ss0 = explicit_slot 400000
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block0(v0: i64):
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return
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}
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; VCode:
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; clgrtle %r15, %r2
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; lay %r1, 400000(%r2)
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; clgrtle %r15, %r1
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; agfi %r15, -400000
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; block0:
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; agfi %r15, 400000
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; clgrtle %r15, %r2 ; trap: stk_ovf
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; lay %r1, 0x61a80(%r2)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; agfi %r15, -0x61a80
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; block1: ; offset 0x14
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; agfi %r15, 0x61a80
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; br %r14
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function %huge_stack_limit(i64 stack_limit) {
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ss0 = explicit_slot 4000000
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block0(v0: i64):
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return
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}
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; VCode:
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; clgrtle %r15, %r2
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; lgr %r1, %r2
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; algfi %r1, 4000000
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; clgrtle %r15, %r1
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; agfi %r15, -4000000
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; block0:
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; agfi %r15, 4000000
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; clgrtle %r15, %r2 ; trap: stk_ovf
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; lgr %r1, %r2
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; algfi %r1, 0x3d0900
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; agfi %r15, -0x3d0900
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; block1: ; offset 0x18
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; agfi %r15, 0x3d0900
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; br %r14
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function %limit_preamble(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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gv2 = load.i64 notrap aligned gv1+4
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stack_limit = gv2
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ss0 = explicit_slot 20
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block0(v0: i64):
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return
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}
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; VCode:
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; la %r1, 24(%r1)
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; clgrtle %r15, %r1
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; aghi %r15, -24
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; block0:
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; aghi %r15, 24
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; la %r1, 0x18(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; aghi %r15, -0x18
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; block1: ; offset 0x18
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; aghi %r15, 0x18
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; br %r14
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function %limit_preamble_large(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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gv2 = load.i64 notrap aligned gv1+4
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stack_limit = gv2
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ss0 = explicit_slot 400000
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block0(v0: i64):
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return
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}
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; VCode:
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1
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; lay %r1, 400000(%r1)
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; clgrtle %r15, %r1
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; agfi %r15, -400000
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; block0:
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; agfi %r15, 400000
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; lay %r1, 0x61a80(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; agfi %r15, -0x61a80
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; block1: ; offset 0x20
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; agfi %r15, 0x61a80
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; br %r14
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function %limit_preamble_huge(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0
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gv2 = load.i64 notrap aligned gv1+4
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stack_limit = gv2
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ss0 = explicit_slot 4000000
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block0(v0: i64):
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return
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}
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; VCode:
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1
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; algfi %r1, 4000000
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; clgrtle %r15, %r1
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; agfi %r15, -4000000
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; block0:
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; agfi %r15, 4000000
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lg %r1, 0(%r2)
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; lg %r1, 4(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; algfi %r1, 0x3d0900
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; agfi %r15, -0x3d0900
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; block1: ; offset 0x20
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; agfi %r15, 0x3d0900
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; br %r14
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function %limit_preamble_huge_offset(i64 vmctx) {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned gv0+1000000
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stack_limit = gv1
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ss0 = explicit_slot 20
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block0(v0: i64):
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return
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}
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; VCode:
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; lgfi %r1, 1000000 ; lg %r1, 0(%r1,%r2)
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; la %r1, 24(%r1)
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; clgrtle %r15, %r1
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; aghi %r15, -24
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; block0:
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; aghi %r15, 24
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; br %r14
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lgfi %r1, 0xf4240
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; lg %r1, 0(%r1, %r2)
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; la %r1, 0x18(%r1)
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; clgrtle %r15, %r1 ; trap: stk_ovf
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; aghi %r15, -0x18
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; block1: ; offset 0x18
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; aghi %r15, 0x18
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; br %r14
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