214755c6a0
With this change we now reuse tests across multiple arches. Duplicate tests were merged into the same file where possible. Some legacy x86 tests were left in separate files due to incompatibilities with the rest of the test suite.
45 lines
1.4 KiB
Plaintext
45 lines
1.4 KiB
Plaintext
test run
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set opt_level=speed_and_size
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set enable_simd
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target x86_64 machinst skylake
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set opt_level=speed_and_size
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set enable_simd
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target x86_64 legacy haswell
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;; x86_64 legacy: Test if bitselect->vselect optimization works properly
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function %mask_from_icmp(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = icmp sge v0, v1
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v3 = raw_bitcast.i32x4 v2
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v4 = bitselect v3, v0, v1
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return v4
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}
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; run: %mask_from_icmp([5 6 7 8], [1 10 20 7]) == [5 10 20 8]
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function %mask_casted(i64x2, i64x2, i32x4) -> i64x2 {
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block0(v0: i64x2, v1: i64x2, v2: i32x4):
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v3 = raw_bitcast.i64x2 v2
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v4 = bitselect v3, v0, v1
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return v4
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}
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; run: %mask_casted([0 0], [0xFFFFFF 0xFFFF4F], [0xFFF1 0 0xF 0]) == [0xFF000E 0xFFFF40]
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function %good_const_mask(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = vconst.i32x4 [0x0000FF00 0x00FF00FF 0x00FF00FF 0xFF00FFFF]
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v4 = bitselect v2, v0, v1
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return v4
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}
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; run: %good_const_mask([0x1234 0x5678 0x1234 0x5678], [0xAAAA 0xAAAA 0xAAAA 0xAAAA]) == [0x12AA 0xAA78 0xAA34 0x5678]
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function %bad_const_mask(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = vconst.i32x4 [0x0000FF00 0x00FF00FF 0x00FF000F 0xFF00FFF0]
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v4 = bitselect v2, v0, v1
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return v4
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}
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; run: %bad_const_mask([0x1234 0x5678 0x1234 0x5678], [0xAAAA 0xAAAA 0xAAAA 0xAAAA]) == [0x12AA 0xAA78 0xAAA4 0x567A]
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