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c1a64a5dc7affbf557f04c18d2e87dcdfc3c46ba
wasmtime/lib/cretonne/src/isa/intel
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Tyler McMullen c1a64a5dc7 Insert a basic epilogue.
2017-12-05 11:49:12 -08:00
..
abi.rs
Add adjust_sp_imm instruction. Note: This enables using rsp and rbp as normal registers. Which is... wrong.
2017-12-05 11:49:12 -08:00
binemit.rs
Add encodings for CPU flags instructions.
2017-10-16 13:07:23 -07:00
enc_tables.rs
Replace as casts with type-conversion functions.
2017-11-08 10:48:44 -08:00
mod.rs
Insert a basic epilogue.
2017-12-05 11:49:12 -08:00
registers.rs
Give RegClassData a reference to its parent RegInfo.
2017-10-04 17:02:09 -07:00
settings.rs
Add support for setting presets.
2017-07-14 13:57:44 -07:00
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