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c16f2956dbf7983eda85bc9f1900ef1afe717f62
wasmtime/cranelift/codegen/src/isa
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Trevor Elliott c16f2956db Allocate a temporary for 64-bit constant loads in the s390x backend (#5357) 
Avoid reusing a destination virtual register for 64-bit constants in the s390x backend. This change addresses a case identified by the regalloc2 ssa validator, as the destination register was written to twice when constants were generated via the MachInst::gen_constant function.
2022-11-30 17:01:14 -08:00
..
aarch64
Implement inline stack probes for AArch64 (#5353)
2022-11-30 12:30:00 -06:00
riscv64
Implement inline stack probes for AArch64 (#5353)
2022-11-30 12:30:00 -06:00
s390x
Allocate a temporary for 64-bit constant loads in the s390x backend (#5357)
2022-11-30 17:01:14 -08:00
unwind
Switch Cranelift over to regalloc2. (#3989)
2022-04-14 10:28:21 -07:00
x64
Don't reuse registers in the x64 div lowering (#5356)
2022-11-30 22:44:59 +00:00
call_conv.rs
Cranellift: remove Baldrdash support and related features. (#4571)
2022-08-02 19:37:56 +00:00
mod.rs
Add fixed_nonallocatable constraints when appropriate (#5253)
2022-11-15 12:49:17 -08:00
unwind.rs
Switch Cranelift over to regalloc2. (#3989)
2022-04-14 10:28:21 -07:00