All values are now references into the value table, so drop the distinction between direct and table values. Direct values don't exist any more. Also remove the parser support for the 'vxNN' syntax. Only 'vNN' values can be parsed now.
65 lines
1.7 KiB
Plaintext
65 lines
1.7 KiB
Plaintext
; Test the legalization of i64 arithmetic instructions.
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test legalizer
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isa riscv supports_m=1
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; regex: V=v\d+
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function bitwise_and(i64, i64) -> i64 {
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ebb0(v1: i64, v2: i64):
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v3 = band v1, v2
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return v3
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}
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; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32):
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; check: [R#ec
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; sameln: $(v3l=$V) = band $v1l, $v2l
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; check: [R#ec
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; sameln: $(v3h=$V) = band $v1h, $v2h
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; check: $v3 = iconcat $v3l, $v3h
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; check: return $v3l, $v3h
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function bitwise_or(i64, i64) -> i64 {
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ebb0(v1: i64, v2: i64):
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v3 = bor v1, v2
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return v3
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}
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; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32):
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; check: [R#cc
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; sameln: $(v3l=$V) = bor $v1l, $v2l
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; check: [R#cc
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; sameln: $(v3h=$V) = bor $v1h, $v2h
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; check: $v3 = iconcat $v3l, $v3h
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; check: return $v3l, $v3h
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function bitwise_xor(i64, i64) -> i64 {
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ebb0(v1: i64, v2: i64):
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v3 = bxor v1, v2
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return v3
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}
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; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32):
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; check: [R#8c
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; sameln: $(v3l=$V) = bxor $v1l, $v2l
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; check: [R#8c
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; sameln: $(v3h=$V) = bxor $v1h, $v2h
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; check: $v3 = iconcat $v3l, $v3h
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; check: return $v3l, $v3h
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function arith_add(i64, i64) -> i64 {
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; Legalizing iadd.i64 requires two steps:
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; 1. Narrow to iadd_cout.i32, then
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; 2. Expand iadd_cout.i32 since RISC-V has no carry flag.
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ebb0(v1: i64, v2: i64):
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v3 = iadd v1, v2
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return v3
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}
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; check: $ebb0($(v1l=$V): i32, $(v1h=$V): i32, $(v2l=$V): i32, $(v2h=$V): i32):
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; check: [R#0c
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; sameln: $(v3l=$V) = iadd $v1l, $v2l
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; check: $(c=$V) = icmp ult $v3l, $v1l
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; check: [R#0c
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; sameln: $(v3h1=$V) = iadd $v1h, $v2h
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; check: $(c_int=$V) = bint.i32 $c
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; check: [R#0c
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; sameln: $(v3h=$V) = iadd $v3h1, $c_int
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; check: $v3 = iconcat $v3l, $v3h
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; check: return $v3l, $v3h
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