be8331d0a0
These operations need custom legalization in order to use Intel's div and idiv instructions.
59 lines
1.4 KiB
Python
59 lines
1.4 KiB
Python
"""
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Custom legalization patterns for Intel.
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"""
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from __future__ import absolute_import
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from cdsl.ast import Var
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from cdsl.xform import Rtl, XFormGroup
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from base.immediates import imm64
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from base.types import i32, i64
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from base import legalize as shared
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from base import instructions as insts
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from . import instructions as x86
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from .defs import ISA
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intel_expand = XFormGroup(
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'intel_expand',
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"""
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Legalize instructions by expansion.
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Use Intel-specific instructions if needed.
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""",
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isa=ISA, chain=shared.expand)
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a = Var('a')
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dead = Var('dead')
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x = Var('x')
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xhi = Var('xhi')
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y = Var('y')
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#
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# Division and remainder.
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#
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intel_expand.legalize(
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a << insts.udiv(x, y),
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Rtl(
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xhi << insts.iconst(imm64(0)),
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(a, dead) << x86.udivmodx(x, xhi, y)
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))
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intel_expand.legalize(
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a << insts.urem(x, y),
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Rtl(
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xhi << insts.iconst(imm64(0)),
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(dead, a) << x86.udivmodx(x, xhi, y)
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))
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for ty in [i32, i64]:
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intel_expand.legalize(
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a << insts.sdiv.bind(ty)(x, y),
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Rtl(
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xhi << insts.sshr_imm(x, imm64(ty.lane_bits() - 1)),
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(a, dead) << x86.sdivmodx(x, xhi, y)
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))
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intel_expand.legalize(
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a << insts.srem.bind(ty)(x, y),
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Rtl(
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xhi << insts.sshr_imm(x, imm64(ty.lane_bits() - 1)),
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(dead, a) << x86.sdivmodx(x, xhi, y)
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))
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