be8331d0a0
These operations need custom legalization in order to use Intel's div and idiv instructions.
50 lines
1.6 KiB
Python
50 lines
1.6 KiB
Python
"""
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Supplementary instruction definitions for Intel.
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This module defines additional instructions that are useful only to the Intel
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target ISA.
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"""
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from cdsl.operands import Operand
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from cdsl.typevar import TypeVar
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from cdsl.instructions import Instruction, InstructionGroup
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GROUP = InstructionGroup("x86", "Intel-specific instruction set")
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iWord = TypeVar('iWord', 'A scalar integer machine word', ints=(32, 64))
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nlo = Operand('nlo', iWord, doc='Low part of numerator')
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nhi = Operand('nhi', iWord, doc='High part of numerator')
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d = Operand('d', iWord, doc='Denominator')
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q = Operand('q', iWord, doc='Quotient')
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r = Operand('r', iWord, doc='Remainder')
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udivmodx = Instruction(
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'x86_udivmodx', r"""
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Extended unsigned division.
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Concatenate the bits in `nhi` and `nlo` to form the numerator.
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Interpret the bits as an unsigned number and divide by the unsigned
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denominator `d`. Trap when `d` is zero or if the quotient is larger
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than the range of the output.
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Return both quotient and remainder.
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""",
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ins=(nlo, nhi, d), outs=(q, r), can_trap=True)
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sdivmodx = Instruction(
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'x86_sdivmodx', r"""
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Extended signed division.
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Concatenate the bits in `nhi` and `nlo` to form the numerator.
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Interpret the bits as a signed number and divide by the signed
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denominator `d`. Trap when `d` is zero or if the quotient is outside
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the range of the output.
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Return both quotient and remainder.
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""",
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ins=(nlo, nhi, d), outs=(q, r), can_trap=True)
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GROUP.close()
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