Ulrich Weigand dfb1bc4d02 Trap handler changes to support s390x (#2871) ...

On s390x, SIGILL and SIGFPE are delivered with the PSW address
pointing *after* the faulting instruction, while SIGSEGV and
SIGBUS are delivered with the PSW address pointing *to* the
faulting instruction.  In order to support this, the common
code trap handler has to distinguish between those cases.

Also, enable SIGFPE on s390x (just like on x86).

2021-05-03 11:56:18 -05:00

..

instance

Optimize table.init instruction and instantiation (#2847)

2021-04-19 18:44:48 -05:00

traphandlers

Trap handler changes to support s390x (#2871)

2021-05-03 11:56:18 -05:00

debug_builtins.rs

Remove the local field of Module (#2091)

2020-08-04 12:29:16 -05:00

export.rs

Update support for the module linking proposal

2021-01-14 10:37:39 -08:00

externref.rs

Make module information lookup from runtime safe.

2021-04-16 12:30:10 -07:00

helpers.c

Use sigsetjmp instead of setjmp (#2645)

2021-02-08 12:05:11 -06:00

imports.rs

Update support for the module linking proposal

2021-01-14 10:37:39 -08:00

instance.rs

Optimize table.init instruction and instantiation (#2847)

2021-04-19 18:44:48 -05:00

jit_int.rs

Disconnects Store state fields from Compiler (#1761)

2020-06-02 13:44:39 -05:00

lib.rs

Add resource limiting to the Wasmtime API. (#2736)

2021-04-19 09:19:20 -05:00

libcalls.rs

Make module information lookup from runtime safe.

2021-04-16 12:30:10 -07:00

memory.rs

Add resource limiting to the Wasmtime API. (#2736)

2021-04-19 09:19:20 -05:00

mmap.rs

More PR feedback changes.

2021-03-04 20:14:40 -08:00

table.rs

Optimize table.init instruction and instantiation (#2847)

2021-04-19 18:44:48 -05:00

traphandlers.rs

Bring back per-thread lazy initialization (#2863)

2021-04-28 12:08:27 -05:00

vmcontext.rs

Add some more #[inline] annotations for trivial functions (#2817)

2021-04-08 12:23:54 -05:00