Jakob Stoklund Olesen b6fa40d6a3 Add a return_reg instruction to the base instruction set. ...

Register-style return is used by all RISC architectures, so it is
natural to have a shared instruction representation.

2017-02-21 13:05:17 -08:00

..

base

Add a return_reg instruction to the base instruction set.

2017-02-21 13:05:17 -08:00

cdsl

Compute register class intersections.

2017-01-25 13:57:43 -08:00

isa

Add operand register constraints.

2017-01-25 13:35:18 -08:00

build.py

Generate register bank descriptions.

2016-11-22 18:15:21 -08:00

check.sh

Run Python checks from test-all.sh

2017-01-25 14:12:36 -08:00

constant_hash.py

Move some utility functions into the cdsl package.

2016-11-11 13:04:30 -08:00

gen_build_deps.py

File stale path references.

2016-10-24 13:27:10 -07:00

gen_encoding.py

Fix a dead code warning from the new Rust compiler.

2017-02-03 11:28:59 -08:00

gen_instr.py

Use PackedOption<Value> instead of NO_VALUE.

2017-01-19 15:55:18 -08:00

gen_legalizer.py

Emit type arguments to builder methods that need it.

2016-11-10 15:55:54 -08:00

gen_registers.py

Give register classes a name.

2017-02-16 13:57:28 -08:00

gen_settings.py

Fill in boilerplate for Intel and ARM targets.

2016-11-23 10:42:07 -08:00

gen_types.py

Move ValueType into a new cdsl top-level module.

2016-11-08 10:12:47 -08:00

srcgen.py

Add PEP 484 type annotations to a bunch of Python code.

2016-10-26 15:15:51 -07:00

test_constant_hash.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

test_srcgen.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

unique_table.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00