Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
78 lines
1.2 KiB
Plaintext
78 lines
1.2 KiB
Plaintext
test compile precise-output
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target aarch64
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function %f0(i32) -> i32 {
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block0(v0: i32):
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v1 = iconst.i32 127
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v2 = uadd_overflow_trap v0, v1, user0
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return v2
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}
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; block0:
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; movz x2, #127
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; adds w0, w0, w2
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; b.lo 8 ; udf
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; ret
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function %f1(i32) -> i32 {
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block0(v0: i32):
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v1 = iconst.i32 127
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v2 = uadd_overflow_trap v1, v0, user0
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return v2
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}
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; block0:
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; movz x2, #127
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; adds w0, w2, w0
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; b.lo 8 ; udf
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; ret
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function %f2(i32, i32) -> i32 {
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block0(v0: i32, v1: i32):
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v2 = uadd_overflow_trap v0, v1, user0
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return v2
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}
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; block0:
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; adds w0, w0, w1
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; b.lo 8 ; udf
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; ret
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function %f3(i64) -> i64 {
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block0(v0: i64):
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v1 = iconst.i64 127
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v2 = uadd_overflow_trap v0, v1, user0
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return v2
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}
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; block0:
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; movz x2, #127
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; adds x0, x0, x2
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; b.lo 8 ; udf
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; ret
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function %f3(i64) -> i64 {
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block0(v0: i64):
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v1 = iconst.i64 127
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v2 = uadd_overflow_trap v1, v0, user0
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return v2
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}
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; block0:
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; movz x2, #127
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; adds x0, x2, x0
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; b.lo 8 ; udf
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; ret
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function %f4(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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v2 = uadd_overflow_trap v0, v1, user0
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return v2
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}
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; block0:
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; adds x0, x0, x1
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; b.lo 8 ; udf
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; ret
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