cb48ea406e
This PR switches the default backend on x86, for both the `cranelift-codegen` crate and for Wasmtime, to the new (`MachInst`-style, `VCode`-based) backend that has been under development and testing for some time now. The old backend is still available by default in builds with the `old-x86-backend` feature, or by requesting `BackendVariant::Legacy` from the appropriate APIs. As part of that switch, it adds some more runtime-configurable plumbing to the testing infrastructure so that tests can be run using the appropriate backend. `clif-util test` is now capable of parsing a backend selector option from filetests and instantiating the correct backend. CI has been updated so that the old x86 backend continues to run its tests, just as we used to run the new x64 backend separately. At some point, we will remove the old x86 backend entirely, once we are satisfied that the new backend has not caused any unforeseen issues and we do not need to revert.
52 lines
1.4 KiB
Plaintext
52 lines
1.4 KiB
Plaintext
test legalizer
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target x86_64 legacy haswell
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;; Need to insert padding after the `i8`s so that the `i32` and `i64` are
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;; aligned.
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function %returner() -> i8, i32, i8, i64 {
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; check: function %returner(i64 sret [%rdi]) -> i64 sret [%rax] fast {
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block0:
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; check: block0(v4: i64):
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v0 = iconst.i8 0
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v1 = iconst.i32 1
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v2 = iconst.i8 2
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v3 = iconst.i64 3
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return v0, v1, v2, v3
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; check: v6 = uextend.i32 v0
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; nextln: istore8 notrap aligned v6, v4
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; nextln: store notrap aligned v1, v4+4
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; nextln: v7 = uextend.i32 v2
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; nextln: istore8 notrap aligned v7, v4+8
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; nextln: store notrap aligned v3, v4+16
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; nextln: return v4
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}
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function %caller() {
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; check: ss0 = sret_slot 24
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fn0 = %returner() -> i8, i32, i8, i64
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; check: sig0 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: fn0 = %returner sig0
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block0:
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v0, v1, v2, v3 = call fn0()
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; check: v4 = stack_addr.i64 ss0
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; nextln: v10 = func_addr.i64 fn0
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; nextln: v5 = call_indirect sig0, v10(v4)
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; nextln: v11 = uload8.i32 notrap aligned v5
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; nextln: v6 = ireduce.i8 v11
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; nextln: v0 -> v6
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; nextln: v7 = load.i32 notrap aligned v5+4
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; nextln: v1 -> v7
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; nextln: v12 = uload8.i32 notrap aligned v5+8
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; nextln: v8 = ireduce.i8 v12
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; nextln: v2 -> v8
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; nextln: v9 = load.i64 notrap aligned v5+16
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; nextln: v3 -> v9
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return
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}
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