Files
wasmtime/cranelift/filetests/filetests/isa/aarch64/constants.clif
Chris Fallin ae5fe8a728 aarch64: fix up regalloc2 semantics. (#4830)
This PR removes all uses of modify-operands in the aarch64 backend,
replacing them with reused-input operands instead. This has the nice
effect of removing a bunch of move instructions and more clearly
representing inputs and outputs.

This PR also removes the explicit use of pinned vregs in the aarch64
backend, instead using fixed-register constraints on the operands when
insts or pseudo-inst sequences require certain registers.

This is the second PR in the regalloc-semantics cleanup series; after
the remaining backend (s390x) and the ABI code are cleaned up as well,
we'll be able to simplify the regalloc2 frontend.
2022-09-01 21:25:20 +00:00

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test compile precise-output
set unwind_info=false
target aarch64
function %f() -> b8 {
block0:
v0 = bconst.b8 true
return v0
}
; block0:
; movz x0, #255
; ret
function %f() -> b16 {
block0:
v0 = bconst.b16 false
return v0
}
; block0:
; movz x0, #0
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0
return v0
}
; block0:
; movz x0, #0
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffff
return v0
}
; block0:
; movz x0, #65535
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffff0000
return v0
}
; block0:
; movz x0, #65535, LSL #16
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffff00000000
return v0
}
; block0:
; movz x0, #65535, LSL #32
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffff000000000000
return v0
}
; block0:
; movz x0, #65535, LSL #48
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffffffffffffffff
return v0
}
; block0:
; movn x0, #0
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffffffffffff0000
return v0
}
; block0:
; movn x0, #65535
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffffffff0000ffff
return v0
}
; block0:
; movn x0, #65535, LSL #16
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xffff0000ffffffff
return v0
}
; block0:
; movn x0, #65535, LSL #32
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0x0000ffffffffffff
return v0
}
; block0:
; movn x0, #65535, LSL #48
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xf34bf0a31212003a ;; random digits
return v0
}
; block0:
; movz x0, #58
; movk x0, x0, #4626, LSL #16
; movk x0, x0, #61603, LSL #32
; movk x0, x0, #62283, LSL #48
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0x12e900001ef40000 ;; random digits with 2 clear half words
return v0
}
; block0:
; movz x0, #7924, LSL #16
; movk x0, x0, #4841, LSL #48
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0x12e9ffff1ef4ffff ;; random digits with 2 full half words
return v0
}
; block0:
; movn x0, #57611, LSL #16
; movk x0, x0, #4841, LSL #48
; ret
function %f() -> i32 {
block0:
v0 = iconst.i32 -1
return v0
}
; block0:
; movn x0, #0
; ret
function %f() -> i32 {
block0:
v0 = iconst.i32 0xfffffff7
return v0
}
; block0:
; movn w0, #8
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xfffffff7
return v0
}
; block0:
; movn w0, #8
; ret
function %f() -> i64 {
block0:
v0 = iconst.i64 0xfffffffffffffff7
return v0
}
; block0:
; movn x0, #8
; ret
function %f() -> f64 {
block0:
v0 = f64const 0x1.0
return v0
}
; block0:
; fmov d0, #1
; ret
function %f() -> f32 {
block0:
v0 = f32const 0x5.0
return v0
}
; block0:
; fmov s0, #5
; ret
function %f() -> f64 {
block0:
v0 = f64const 0x32.0
return v0
}
; block0:
; movz x2, #16457, LSL #48
; fmov d0, x2
; ret
function %f() -> f32 {
block0:
v0 = f32const 0x32.0
return v0
}
; block0:
; movz x2, #16968, LSL #16
; fmov s0, w2
; ret
function %f() -> f64 {
block0:
v0 = f64const 0x0.0
return v0
}
; block0:
; movi v0.2s, #0
; ret
function %f() -> f32 {
block0:
v0 = f32const 0x0.0
return v0
}
; block0:
; movi v0.2s, #0
; ret
function %f() -> f64 {
block0:
v0 = f64const -0x10.0
return v0
}
; block0:
; fmov d0, #-16
; ret
function %f() -> f32 {
block0:
v0 = f32const -0x10.0
return v0
}
; block0:
; fmov s0, #-16
; ret