Anton Kirilov adf25d27c2 AArch64: Implement SIMD floating-point arithmetic ...

Copyright (c) 2020, Arm Limited.

2020-07-28 15:19:47 +01:00

..

args.rs

Aarch64: mask shift-amounts incorporated into reg-reg-shift ALU insts.

2020-07-17 14:55:23 -07:00

emit_tests.rs

AArch64: Implement SIMD floating-point arithmetic

2020-07-28 15:19:47 +01:00

emit.rs

AArch64: Implement SIMD floating-point arithmetic

2020-07-28 15:19:47 +01:00

imms.rs

Refactor the InstSize enum in the AArch64 backend

2020-07-14 15:04:35 +01:00

mod.rs

AArch64: Implement SIMD floating-point arithmetic

2020-07-28 15:19:47 +01:00

regs.rs

AArch64: Introduce an enum to specify vector instruction operand sizes

2020-07-14 21:37:44 +01:00