Jakob Stoklund Olesen a21935a5a2 Add 32-bit ops to RV64. ...

The 32-bit arithmetic instructions are encoded differently in the RISC-V 64-bit
mode.

2016-08-26 16:13:22 -07:00

..

__init__.py

Move predicate collection into TargetISA.

2016-08-26 09:37:05 -07:00

defs.py

Python 3 compat.

2016-08-23 16:35:58 -07:00

encodings.py

Add 32-bit ops to RV64.

2016-08-26 16:13:22 -07:00

recipes.py

Add RISC-V arithmetic w/immediate operand encodings.

2016-08-24 08:53:44 -07:00

settings.py

Python 3 compat.

2016-08-23 16:35:58 -07:00