Files
wasmtime/cranelift/filetests/filetests/isa/riscv64/i128-bmask.clif
Trevor Elliott 7d28d586da riscv64: Don't reuse registers when loading constants (#5376)
Rework the constant loading functions in the riscv64 backend to generate fresh temporaries instead of reusing the destination register.
2022-12-05 16:51:52 -08:00

119 lines
1.8 KiB
Plaintext

test compile precise-output
set unwind_info=false
target riscv64
function %bmask_i128_i128(i128) -> i128 {
block0(v0: i128):
v1 = bmask.i128 v0
return v1
}
; block0:
; or a0,a0,a1
; li a2,-1
; select_reg a1,zero,a2##condition=(zero eq a0)
; mv a0,a1
; ret
function %bmask_i128_i64(i128) -> i64 {
block0(v0: i128):
v1 = bmask.i64 v0
return v1
}
; block0:
; or a0,a0,a1
; li a2,-1
; select_reg a0,zero,a2##condition=(zero eq a0)
; ret
function %bmask_i128_i32(i128) -> i32 {
block0(v0: i128):
v1 = bmask.i32 v0
return v1
}
; block0:
; or a0,a0,a1
; li a2,-1
; select_reg a0,zero,a2##condition=(zero eq a0)
; ret
function %bmask_i128_i16(i128) -> i16 {
block0(v0: i128):
v1 = bmask.i16 v0
return v1
}
; block0:
; or a0,a0,a1
; li a2,-1
; select_reg a0,zero,a2##condition=(zero eq a0)
; ret
function %bmask_i128_i8(i128) -> i8 {
block0(v0: i128):
v1 = bmask.i8 v0
return v1
}
; block0:
; or a0,a0,a1
; li a2,-1
; select_reg a0,zero,a2##condition=(zero eq a0)
; ret
function %bmask_i64_i128(i64) -> i128 {
block0(v0: i64):
v1 = bmask.i128 v0
return v1
}
; block0:
; li t2,-1
; select_reg a1,zero,t2##condition=(zero eq a0)
; mv a0,a1
; ret
function %bmask_i32_i128(i32) -> i128 {
block0(v0: i32):
v1 = bmask.i128 v0
return v1
}
; block0:
; addiw t2,a0,0
; li a1,-1
; select_reg a1,zero,a1##condition=(zero eq t2)
; mv a0,a1
; ret
function %bmask_i16_i128(i16) -> i128 {
block0(v0: i16):
v1 = bmask.i128 v0
return v1
}
; block0:
; lui a1,16
; addi a1,a1,4095
; and a3,a0,a1
; li a5,-1
; select_reg a1,zero,a5##condition=(zero eq a3)
; mv a0,a1
; ret
function %bmask_i8_i128(i8) -> i128 {
block0(v0: i8):
v1 = bmask.i128 v0
return v1
}
; block0:
; andi t2,a0,255
; li a1,-1
; select_reg a1,zero,a1##condition=(zero eq t2)
; mv a0,a1
; ret