Jakob Stoklund Olesen a9e799debb Add an avoid_div_traps setting. ...

This enables code generation that never causes a SIGFPE signal to be
raised from a division instruction. Instead, division and remainder
calculations are protected by explicit traps.

2018-02-16 13:10:29 -08:00

..

abi.rs

Stack alignment is 16 bytes on x86_64.

2018-01-31 16:19:35 -08:00

binemit.rs

Add Intel encodings for trapif.

2018-02-08 15:15:15 -08:00

enc_tables.rs

Add an avoid_div_traps setting.

2018-02-16 13:10:29 -08:00

mod.rs

TargetIsa implies a Display of shared and isa-specific flags

2018-01-29 13:53:08 -08:00

registers.rs

Add Intel encodings for ifcmp_sp.

2018-02-09 14:32:29 -08:00

settings.rs

gen_settings: dont try to display a Preset descriptor in Flags (#241)

2018-02-14 11:51:40 -08:00