230e2135d6
* Cranelift: remove non-egraphs optimization pipeline and `use_egraphs` option. This PR removes the LICM, GVN, and preopt passes, and associated support pieces, from `cranelift-codegen`. Not to worry, we still have optimizations: the egraph framework subsumes all of these, and has been on by default since #5181. A few decision points: - Filetests for the legacy LICM, GVN and simple_preopt were removed too. As we built optimizations in the egraph framework we wrote new tests for the equivalent functionality, and many of the old tests were testing specific behaviors in the old implementations that may not be relevant anymore. However if folks prefer I could take a different approach here and try to port over all of the tests. - The corresponding filetest modes (commands) were deleted too. The `test alias_analysis` mode remains, but no longer invokes a separate GVN first (since there is no separate GVN that will not also do alias analysis) so the tests were tweaked slightly to work with that. The egrpah testsuite also covers alias analysis. - The `divconst_magic_numbers` module is removed since it's unused without `simple_preopt`, though this is the one remaining optimization we still need to build in the egraphs framework, pending #5908. The magic numbers will live forever in git history so removing this in the meantime is not a major issue IMHO. - The `use_egraphs` setting itself was removed at both the Cranelift and Wasmtime levels. It has been marked deprecated for a few releases now (Wasmtime 6.0, 7.0, upcoming 8.0, and corresponding Cranelift versions) so I think this is probably OK. As an alternative if anyone feels strongly, we could leave the setting and make it a no-op. * Update test outputs for remaining test differences.
394 lines
12 KiB
Plaintext
394 lines
12 KiB
Plaintext
test run
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target riscv64
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function %a(i16, f64, i32, i64, i16, i128, f32) -> i16 {
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ss0 = explicit_slot 24
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block0(v0: i16, v1: f64, v2: i32, v3: i64, v4: i16, v5: i128, v6: f32):
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v8 = iconst.i8 0
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v9 = iconst.i16 0
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v10 = iconst.i32 0
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v11 = iconst.i64 0
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v12 = uextend.i128 v11 ; v11 = 0
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stack_store v12, ss0
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stack_store v11, ss0+16 ; v11 = 0
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v55 = iconst.i32 0
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v56 = iconst.i32 1
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v57 = icmp eq v2, v55 ; v55 = 0
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v58 = ishl_imm v56, 31 ; v56 = 1
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v59 = isub v55, v56 ; v55 = 0, v56 = 1
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v60 = icmp eq v2, v58
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v61 = icmp eq v2, v59
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v62 = band v60, v61
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v63 = bor v57, v62
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v64 = select v63, v56, v2 ; v56 = 1
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v13 = sdiv v2, v64
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v65 = iconst.i32 0
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v66 = iconst.i32 1
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v67 = icmp eq v13, v65 ; v65 = 0
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v68 = ishl_imm v66, 31 ; v66 = 1
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v69 = isub v65, v66 ; v65 = 0, v66 = 1
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v70 = icmp eq v13, v68
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v71 = icmp eq v13, v69
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v72 = band v70, v71
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v73 = bor v67, v72
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v74 = select v73, v66, v13 ; v66 = 1
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v14 = sdiv v13, v74
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v75 = iconst.i32 0
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v76 = iconst.i32 1
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v77 = icmp eq v14, v75 ; v75 = 0
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v78 = ishl_imm v76, 31 ; v76 = 1
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v79 = isub v75, v76 ; v75 = 0, v76 = 1
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v80 = icmp eq v14, v78
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v81 = icmp eq v14, v79
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v82 = band v80, v81
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v83 = bor v77, v82
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v84 = select v83, v76, v14 ; v76 = 1
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v15 = sdiv v14, v84
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v85 = iconst.i64 0
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v86 = iconst.i64 1
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v87 = icmp eq v3, v85 ; v85 = 0
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v88 = ishl_imm v86, 63 ; v86 = 1
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v89 = isub v85, v86 ; v85 = 0, v86 = 1
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v90 = icmp eq v3, v88
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v91 = icmp eq v3, v89
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v92 = band v90, v91
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v93 = bor v87, v92
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v94 = select v93, v86, v3 ; v86 = 1
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v16 = sdiv v3, v94
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v95 = iconst.i32 0
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v96 = iconst.i32 1
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v97 = icmp eq v15, v95 ; v95 = 0
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v98 = ishl_imm v96, 31 ; v96 = 1
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v99 = isub v95, v96 ; v95 = 0, v96 = 1
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v100 = icmp eq v15, v98
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v101 = icmp eq v15, v99
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v102 = band v100, v101
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v103 = bor v97, v102
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v104 = select v103, v96, v15 ; v96 = 1
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v17 = sdiv v15, v104
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v18 = fmax_pseudo v6, v6
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v105 = iconst.i32 0
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v106 = iconst.i32 1
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v107 = icmp eq v17, v105 ; v105 = 0
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v108 = ishl_imm v106, 31 ; v106 = 1
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v109 = isub v105, v106 ; v105 = 0, v106 = 1
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v110 = icmp eq v17, v108
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v111 = icmp eq v17, v109
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v112 = band v110, v111
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v113 = bor v107, v112
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v114 = select v113, v106, v17 ; v106 = 1
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v19 = sdiv v17, v114
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v115 = iconst.i32 0
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v116 = iconst.i32 1
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v117 = icmp eq v19, v115 ; v115 = 0
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v118 = ishl_imm v116, 31 ; v116 = 1
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v119 = isub v115, v116 ; v115 = 0, v116 = 1
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v120 = icmp eq v19, v118
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v121 = icmp eq v19, v119
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v122 = band v120, v121
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v123 = bor v117, v122
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v124 = select v123, v116, v19 ; v116 = 1
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v20 = sdiv v19, v124
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v125 = iconst.i32 0
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v126 = iconst.i32 1
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v127 = icmp eq v20, v125 ; v125 = 0
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v128 = ishl_imm v126, 31 ; v126 = 1
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v129 = isub v125, v126 ; v125 = 0, v126 = 1
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v130 = icmp eq v20, v128
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v131 = icmp eq v20, v129
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v132 = band v130, v131
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v133 = bor v127, v132
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v134 = select v133, v126, v20 ; v126 = 1
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v21 = sdiv v20, v134
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stack_store v16, ss0+4
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v135 = iconst.i32 0
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v136 = iconst.i32 1
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v137 = icmp eq v21, v135 ; v135 = 0
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v138 = ishl_imm v136, 31 ; v136 = 1
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v139 = isub v135, v136 ; v135 = 0, v136 = 1
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v140 = icmp eq v21, v138
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v141 = icmp eq v21, v139
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v142 = band v140, v141
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v143 = bor v137, v142
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v144 = select v143, v136, v21 ; v136 = 1
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v22 = sdiv v21, v144
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v145 = iconst.i32 0
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v146 = iconst.i32 1
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v147 = icmp eq v22, v145 ; v145 = 0
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v148 = ishl_imm v146, 31 ; v146 = 1
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v149 = isub v145, v146 ; v145 = 0, v146 = 1
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v150 = icmp eq v22, v148
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v151 = icmp eq v22, v149
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v152 = band v150, v151
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v153 = bor v147, v152
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v154 = select v153, v146, v22 ; v146 = 1
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v23 = sdiv v22, v154
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v155 = iconst.i32 0
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v156 = iconst.i32 1
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v157 = icmp eq v23, v155 ; v155 = 0
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v158 = ishl_imm v156, 31 ; v156 = 1
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v159 = isub v155, v156 ; v155 = 0, v156 = 1
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v160 = icmp eq v23, v158
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v161 = icmp eq v23, v159
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v162 = band v160, v161
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v163 = bor v157, v162
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v164 = select v163, v156, v23 ; v156 = 1
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v24 = sdiv v23, v164
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v165 = iconst.i32 0
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v166 = iconst.i32 1
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v167 = icmp eq v24, v165 ; v165 = 0
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v168 = ishl_imm v166, 31 ; v166 = 1
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v169 = isub v165, v166 ; v165 = 0, v166 = 1
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v170 = icmp eq v24, v168
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v171 = icmp eq v24, v169
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v172 = band v170, v171
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v173 = bor v167, v172
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v174 = select v173, v166, v24 ; v166 = 1
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v25 = sdiv v24, v174
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v175 = iconst.i32 0
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v176 = iconst.i32 1
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v177 = icmp eq v25, v175 ; v175 = 0
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v178 = ishl_imm v176, 31 ; v176 = 1
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v179 = isub v175, v176 ; v175 = 0, v176 = 1
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v180 = icmp eq v25, v178
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v181 = icmp eq v25, v179
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v182 = band v180, v181
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v183 = bor v177, v182
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v184 = select v183, v176, v25 ; v176 = 1
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v26 = sdiv v25, v184
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v185 = iconst.i32 0
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v186 = iconst.i32 1
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v187 = icmp eq v26, v185 ; v185 = 0
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v188 = ishl_imm v186, 31 ; v186 = 1
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v189 = isub v185, v186 ; v185 = 0, v186 = 1
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v190 = icmp eq v26, v188
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v191 = icmp eq v26, v189
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v192 = band v190, v191
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v193 = bor v187, v192
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v194 = select v193, v186, v26 ; v186 = 1
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v27 = sdiv v26, v194
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v195 = iconst.i32 0
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v196 = iconst.i32 1
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v197 = icmp eq v27, v195 ; v195 = 0
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v198 = ishl_imm v196, 31 ; v196 = 1
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v199 = isub v195, v196 ; v195 = 0, v196 = 1
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v200 = icmp eq v27, v198
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v201 = icmp eq v27, v199
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v202 = band v200, v201
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v203 = bor v197, v202
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v204 = select v203, v196, v27 ; v196 = 1
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v28 = sdiv v27, v204
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v205 = iconst.i32 0
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v206 = iconst.i32 1
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v207 = icmp eq v28, v205 ; v205 = 0
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v208 = ishl_imm v206, 31 ; v206 = 1
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v209 = isub v205, v206 ; v205 = 0, v206 = 1
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v210 = icmp eq v28, v208
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v211 = icmp eq v28, v209
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v212 = band v210, v211
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v213 = bor v207, v212
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v214 = select v213, v206, v28 ; v206 = 1
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v29 = sdiv v28, v214
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v52 = nearest v1
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v53 = fcmp ne v52, v52
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v54 = f64const +NaN
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v30 = select v53, v54, v52 ; v54 = +NaN
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v215 = iconst.i32 0
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v216 = iconst.i32 1
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v217 = icmp eq v29, v215 ; v215 = 0
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v218 = ishl_imm v216, 31 ; v216 = 1
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v219 = isub v215, v216 ; v215 = 0, v216 = 1
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v220 = icmp eq v29, v218
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v221 = icmp eq v29, v219
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v222 = band v220, v221
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v223 = bor v217, v222
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v224 = select v223, v216, v29 ; v216 = 1
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v31 = sdiv v29, v224
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v225 = iconst.i32 0
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v226 = iconst.i32 1
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v227 = icmp eq v31, v225 ; v225 = 0
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v228 = ishl_imm v226, 31 ; v226 = 1
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v229 = isub v225, v226 ; v225 = 0, v226 = 1
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v230 = icmp eq v31, v228
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v231 = icmp eq v31, v229
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v232 = band v230, v231
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v233 = bor v227, v232
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v234 = select v233, v226, v31 ; v226 = 1
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v32 = sdiv v31, v234
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v235 = iconst.i32 0
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v236 = iconst.i32 1
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v237 = icmp eq v32, v235 ; v235 = 0
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v238 = ishl_imm v236, 31 ; v236 = 1
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v239 = isub v235, v236 ; v235 = 0, v236 = 1
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v240 = icmp eq v32, v238
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v241 = icmp eq v32, v239
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v242 = band v240, v241
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v243 = bor v237, v242
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v244 = select v243, v236, v32 ; v236 = 1
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v33 = sdiv v32, v244
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v245 = iconst.i32 0
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v246 = iconst.i32 1
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v247 = icmp eq v33, v245 ; v245 = 0
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v248 = ishl_imm v246, 31 ; v246 = 1
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v249 = isub v245, v246 ; v245 = 0, v246 = 1
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v250 = icmp eq v33, v248
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v251 = icmp eq v33, v249
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v252 = band v250, v251
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v253 = bor v247, v252
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v254 = select v253, v246, v33 ; v246 = 1
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v34 = sdiv v33, v254
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v35 = fmax_pseudo v18, v18
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v255 = iconst.i32 0
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v256 = iconst.i32 1
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v257 = icmp eq v34, v255 ; v255 = 0
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v258 = ishl_imm v256, 31 ; v256 = 1
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v259 = isub v255, v256 ; v255 = 0, v256 = 1
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v260 = icmp eq v34, v258
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v261 = icmp eq v34, v259
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v262 = band v260, v261
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v263 = bor v257, v262
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v264 = select v263, v256, v34 ; v256 = 1
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v36 = sdiv v34, v264
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v265 = iconst.i32 0
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v266 = iconst.i32 1
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v267 = icmp eq v36, v265 ; v265 = 0
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v268 = ishl_imm v266, 31 ; v266 = 1
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v269 = isub v265, v266 ; v265 = 0, v266 = 1
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v270 = icmp eq v36, v268
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v271 = icmp eq v36, v269
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v272 = band v270, v271
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v273 = bor v267, v272
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v274 = select v273, v266, v36 ; v266 = 1
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v37 = sdiv v36, v274
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v275 = iconst.i32 0
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v276 = iconst.i32 1
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v277 = icmp eq v37, v275 ; v275 = 0
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v278 = ishl_imm v276, 31 ; v276 = 1
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v279 = isub v275, v276 ; v275 = 0, v276 = 1
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v280 = icmp eq v37, v278
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v281 = icmp eq v37, v279
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v282 = band v280, v281
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v283 = bor v277, v282
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v284 = select v283, v276, v37 ; v276 = 1
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v38 = sdiv v37, v284
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stack_store v16, ss0+4
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v285 = iconst.i32 0
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v286 = iconst.i32 1
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v287 = icmp eq v38, v285 ; v285 = 0
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v288 = ishl_imm v286, 31 ; v286 = 1
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v289 = isub v285, v286 ; v285 = 0, v286 = 1
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v290 = icmp eq v38, v288
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v291 = icmp eq v38, v289
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v292 = band v290, v291
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v293 = bor v287, v292
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v294 = select v293, v286, v38 ; v286 = 1
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v39 = sdiv v38, v294
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v295 = iconst.i32 0
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v296 = iconst.i32 1
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v297 = icmp eq v39, v295 ; v295 = 0
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v298 = ishl_imm v296, 31 ; v296 = 1
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v299 = isub v295, v296 ; v295 = 0, v296 = 1
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v300 = icmp eq v39, v298
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v301 = icmp eq v39, v299
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v302 = band v300, v301
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v303 = bor v297, v302
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v304 = select v303, v296, v39 ; v296 = 1
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v40 = sdiv v39, v304
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v41 = rotr v16, v16
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v305 = iconst.i32 0
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v306 = iconst.i32 1
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v307 = icmp eq v40, v305 ; v305 = 0
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v308 = ishl_imm v306, 31 ; v306 = 1
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v309 = isub v305, v306 ; v305 = 0, v306 = 1
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v310 = icmp eq v40, v308
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v311 = icmp eq v40, v309
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v312 = band v310, v311
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v313 = bor v307, v312
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v314 = select v313, v306, v40 ; v306 = 1
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v42 = sdiv v40, v314
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v315 = iconst.i32 0
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v316 = iconst.i32 1
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v317 = icmp eq v42, v315 ; v315 = 0
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v318 = ishl_imm v316, 31 ; v316 = 1
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v319 = isub v315, v316 ; v315 = 0, v316 = 1
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v320 = icmp eq v42, v318
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v321 = icmp eq v42, v319
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v322 = band v320, v321
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v323 = bor v317, v322
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v324 = select v323, v316, v42 ; v316 = 1
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v43 = sdiv v42, v324
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v325 = iconst.i32 0
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v326 = iconst.i32 1
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v327 = icmp eq v43, v325 ; v325 = 0
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v328 = ishl_imm v326, 31 ; v326 = 1
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v329 = isub v325, v326 ; v325 = 0, v326 = 1
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v330 = icmp eq v43, v328
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v331 = icmp eq v43, v329
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v332 = band v330, v331
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v333 = bor v327, v332
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v334 = select v333, v326, v43 ; v326 = 1
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v44 = sdiv v43, v334
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v335 = iconst.i32 0
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v336 = iconst.i32 1
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v337 = icmp eq v44, v335 ; v335 = 0
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v338 = ishl_imm v336, 31 ; v336 = 1
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v339 = isub v335, v336 ; v335 = 0, v336 = 1
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v340 = icmp eq v44, v338
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v341 = icmp eq v44, v339
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v342 = band v340, v341
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v343 = bor v337, v342
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v344 = select v343, v336, v44 ; v336 = 1
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v45 = sdiv v44, v344
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v345 = iconst.i32 0
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v346 = iconst.i32 1
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v347 = icmp eq v45, v345 ; v345 = 0
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v348 = ishl_imm v346, 31 ; v346 = 1
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v349 = isub v345, v346 ; v345 = 0, v346 = 1
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v350 = icmp eq v45, v348
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v351 = icmp eq v45, v349
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v352 = band v350, v351
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v353 = bor v347, v352
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v354 = select v353, v346, v45 ; v346 = 1
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v46 = sdiv v45, v354
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v355 = iconst.i32 0
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v356 = iconst.i32 1
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v357 = icmp eq v46, v355 ; v355 = 0
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v358 = ishl_imm v356, 31 ; v356 = 1
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v359 = isub v355, v356 ; v355 = 0, v356 = 1
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v360 = icmp eq v46, v358
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v361 = icmp eq v46, v359
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v362 = band v360, v361
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v363 = bor v357, v362
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v364 = select v363, v356, v46 ; v356 = 1
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v47 = sdiv v46, v364
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v48 = bxor v5, v5
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v365 = iconst.i32 0
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v366 = iconst.i32 1
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v367 = icmp eq v47, v365 ; v365 = 0
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v368 = ishl_imm v366, 31 ; v366 = 1
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v369 = isub v365, v366 ; v365 = 0, v366 = 1
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v370 = icmp eq v47, v368
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v371 = icmp eq v47, v369
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v372 = band v370, v371
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v373 = bor v367, v372
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v374 = select v373, v366, v47 ; v366 = 1
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v49 = sdiv v47, v374
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v375 = iconst.i32 0
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v376 = iconst.i32 1
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v377 = icmp eq v49, v375 ; v375 = 0
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v378 = ishl_imm v376, 31 ; v376 = 1
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v379 = isub v375, v376 ; v375 = 0, v376 = 1
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v380 = icmp eq v49, v378
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|
v381 = icmp eq v49, v379
|
|
v382 = band v380, v381
|
|
v383 = bor v377, v382
|
|
v384 = select v383, v376, v49 ; v376 = 1
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|
v50 = sdiv v49, v384
|
|
v51 = stack_addr.i64 ss0+4
|
|
store v30, v51+6
|
|
return v0
|
|
}
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|
|
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; run: %a(8, 0.0, 0, 0, 0, 0, 0.0) == 8
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