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a98f9982fdd79e3646901599b725d5a26e710656
wasmtime/cranelift/codegen/src/machinst
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bjorn3 376c93bda0 Remove MachBackend
It is identical to TargetIsa
2022-01-06 15:08:12 +01:00
..
abi_impl.rs
Fix spillslot size bug in SIMD by removing type-dependent spillslot allocation.
2022-01-04 13:24:40 -08:00
abi.rs
Fix spillslot size bug in SIMD by removing type-dependent spillslot allocation.
2022-01-04 13:24:40 -08:00
blockorder.rs
cranelift codegen & filetests: silence new dead code warnings in rust 1.57
2021-12-03 10:33:09 -08:00
buffer.rs
Remove unnecessary fields from CodeInfo
2022-01-04 18:05:45 +01:00
compile.rs
Remove MachBackend
2022-01-06 15:08:12 +01:00
debug.rs
Address review comments.
2021-01-22 16:02:29 -08:00
helpers.rs
x86-64 Windows fastcall ABI support.
2021-03-03 19:53:18 -08:00
inst_common.rs
More atomic ops
2021-02-18 14:16:15 +01:00
isle.rs
aarch64: Migrate ishl/ushr/sshr to ISLE (#3608)
2021-12-16 17:37:53 -06:00
lower.rs
Fix iadd_ifcout lowering in ISLE to return a register corresponding to the iflags.
2021-12-08 11:59:38 -08:00
mod.rs
Remove MachBackend
2022-01-06 15:08:12 +01:00
regmapping.rs
aarch64: Migrate uextend/sextend to ISLE
2021-12-14 07:01:37 -08:00
valueregs.rs
x86-64 Windows fastcall ABI support.
2021-03-03 19:53:18 -08:00
vcode.rs
Fix spillslot size bug in SIMD by removing type-dependent spillslot allocation.
2022-01-04 13:24:40 -08:00
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