cdecc858b4
Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
42 lines
715 B
Plaintext
42 lines
715 B
Plaintext
test interpret
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test run
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target aarch64
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target aarch64 use_bti
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target x86_64
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target s390x
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target riscv64
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function %br_table_i32(i32) -> i32 {
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jt0 = jump_table [block1, block2, block2, block3]
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block0(v0: i32):
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br_table v0, block4, jt0
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block1:
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v1 = iconst.i32 1
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jump block5(v1)
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block2:
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v2 = iconst.i32 2
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jump block5(v2)
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block3:
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v3 = iconst.i32 3
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jump block5(v3)
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block4:
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v4 = iconst.i32 4
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jump block5(v4)
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block5(v5: i32):
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v6 = iadd.i32 v0, v5
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return v6
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}
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; run: %br_table_i32(0) == 1
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; run: %br_table_i32(1) == 3
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; run: %br_table_i32(2) == 4
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; run: %br_table_i32(3) == 6
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; run: %br_table_i32(4) == 8
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; run: %br_table_i32(5) == 9
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; run: %br_table_i32(6) == 10
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; run: %br_table_i32(-1) == 3 |