Andrew Brown 2a9f458ea3 x64: lower i8x16.shuffle to VPERMI2B when possible ...

When shuffling values from two different registers, the x64 lowering for
`i8x16.shuffle` must first shuffle each register separately and then OR
the results with SSE instructions. With `VPERMI2B`, available in
AVX512VL + AVX512VBMI, this can be done in a single instruction after
the shuffle mask has been moved into the destination register. This
change uses `VPERMI2B` for that case when the CPU supports it.

2021-06-01 11:40:53 -07:00

..

cdsl

Add a wasmtime settings command to print Cranelift settings.

2021-04-01 19:38:19 -07:00

isa

x64: lower i8x16.shuffle to VPERMI2B when possible

2021-06-01 11:40:53 -07:00

shared

Make the CFG metadata computation conditional on a flag.

2021-05-24 13:01:15 -07:00

default_map.rs

Add documentation for top-level items in cranelift-codegen/meta

2019-10-31 09:35:08 -07:00

error.rs

Add documentation for top-level items in cranelift-codegen/meta

2019-10-31 09:35:08 -07:00

gen_binemit.rs

Fix clippy warnings.

2019-10-24 17:20:12 -07:00

gen_encodings.rs

Fix a number of warnings on nightly Rust (#2652)

2021-02-11 12:42:45 -06:00

gen_inst.rs

Add serde serialization support for the full clif ir

2021-02-18 11:27:02 +01:00

gen_legalizer.rs

machinst x64: Only use the feature flag to enable the x64 new backend;

2020-07-15 13:11:28 +02:00

gen_registers.rs

Remove dependency on hard-coded ordering of x86 register banks

2020-03-06 10:53:22 -08:00

gen_settings.rs

Change how flags are stored in serialized modules.

2021-04-01 21:39:57 -07:00

gen_types.rs

[meta] Make more things pub(crate) instead of pub;

2019-09-23 14:42:20 +02:00

lib.rs

Support IBM z/Architecture

2021-05-10 16:01:16 +02:00

srcgen.rs

[meta] Add more pub(crate) definitions.

2019-10-29 14:23:10 +01:00

unique_table.rs

Add documentation for top-level items in cranelift-codegen/meta

2019-10-31 09:35:08 -07:00