Jakob Stoklund Olesen a4acc26d5a Add an enable_e setting for the RV32E instruction set. ...

This limited RISC-V version only has registers %x0 - %x15.

Make sure the ABI lowering code doesn't use the banned registers for
arguments.

2017-04-26 13:50:52 -07:00

..

arm32

Add a section about implementation limits.

2017-02-24 11:08:15 -08:00

arm64

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

intel

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

riscv

Add an enable_e setting for the RV32E instruction set.

2017-04-26 13:50:52 -07:00

__init__.py

Fixed for mypy 0.501.

2017-03-03 09:08:28 -08:00