Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
16 lines
325 B
Plaintext
16 lines
325 B
Plaintext
test interpret
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test run
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target aarch64
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target riscv64
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target s390x
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; x86_64 backend only supports `i16`, `i32`, and `i64` types.
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function %smulhi_i8(i8, i8) -> i8 {
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block0(v0: i8, v1: i8):
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v2 = smulhi v0, v1
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return v2
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}
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; run: %smulhi_i8(-2, -4) == 0
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; run: %smulhi_i8(2, -4) == -1
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; run: %smulhi_i8(127, 127) == 63
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