Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
44 lines
1.0 KiB
Plaintext
44 lines
1.0 KiB
Plaintext
test interpret
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test run
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set enable_llvm_abi_extensions=true
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target aarch64
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target s390x
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target x86_64
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target riscv64
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function %ireduce_128_64(i128) -> i64 {
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block0(v0: i128):
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v1 = ireduce.i64 v0
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return v1
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}
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; run: %ireduce_128_64(0) == 0
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; run: %ireduce_128_64(-1) == -1
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; run: %ireduce_128_64(0xDECAFFFF_C0FFEEEE_C0FFEEEE_DECAFFFF) == 0xC0FFEEEE_DECAFFFF
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function %ireduce_128_32(i128) -> i32 {
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block0(v0: i128):
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v1 = ireduce.i32 v0
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return v1
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}
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; run: %ireduce_128_32(0) == 0
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; run: %ireduce_128_32(-1) == -1
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; run: %ireduce_128_32(0xDECAFFFF_C0FFEEEE_C0FFEEEE_DECAFFFF) == 0xDECAFFFF
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function %ireduce_128_16(i128) -> i16 {
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block0(v0: i128):
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v1 = ireduce.i16 v0
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return v1
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}
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; run: %ireduce_128_16(0) == 0
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; run: %ireduce_128_16(-1) == -1
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; run: %ireduce_128_16(0xDECAFFFF_C0FFEEEE_C0FFEEEE_DECAFFFF) == 0xFFFF
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function %ireduce_128_8(i128) -> i8 {
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block0(v0: i128):
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v1 = ireduce.i8 v0
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return v1
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}
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; run: %ireduce_128_8(0) == 0
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; run: %ireduce_128_8(-1) == -1
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; run: %ireduce_128_8(0xDECAFFFF_C0FFEEEE_C0FFEEEE_DECAFFFF) == 0xFF
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