9e088e4164
This patch: * removes the "default" opt level, on the basis that it has no definition and is referred to nowhere in the compiler. * renames the "fastest" level to "none". The resulting set of transformations is unchanged. * renames the "best" level to "speed_and_size". The resulting set of transformations is unchanged. * adds a new level, "speed". This is the same as "speed_and_size" except that it omits transformations aimed only at reducing code size. Currently it omits only the insn shrinking pass.
73 lines
1.8 KiB
Plaintext
73 lines
1.8 KiB
Plaintext
; Check that floating-point constants equal to zero are optimized correctly.
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test binemit
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set opt_level=speed_and_size
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target x86_64
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function %zero_const_32bit_no_rex() -> f32 fast {
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ebb0:
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; asm: xorps %xmm0, %xmm0
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[-,%xmm0] v0 = f32const 0.0 ; bin: 0f 57 c0
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return v0
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}
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function %zero_const_32bit_rex() -> f32 fast {
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ebb0:
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; asm: xorps %xmm8, %xmm8
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[-,%xmm8] v1 = f32const 0.0 ; bin: 45 0f 57 c0
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return v1
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}
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function %zero_const_64bit_no_rex() -> f64 fast {
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ebb0:
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; asm: xorpd %xmm0, %xmm0
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[-,%xmm0] v0 = f64const 0.0 ; bin: 66 0f 57 c0
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return v0
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}
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function %zero_const_64bit_rex() -> f64 fast {
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ebb0:
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; asm: xorpd %xmm8, %xmm8
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[-,%xmm8] v1 = f64const 0.0 ; bin: 66 45 0f 57 c0
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return v1
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}
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function %imm_zero_register() -> i64 fast {
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ebb0:
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; asm: xor %eax, %eax
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[-,%rax] v0 = iconst.i64 0 ; bin: 31 c0
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; asm: xor %edi, %edi
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[-,%rdi] v1 = iconst.i64 0 ; bin: 31 ff
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; asm: xor %r8, r8
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[-,%r8] v2 = iconst.i64 0 ; bin: 45 31 c0
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; asm: xor %r15, %r15
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[-,%r15] v4 = iconst.i64 0 ; bin: 45 31 ff
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return v0
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}
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function %zero_word() -> i16 fast {
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ebb0:
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; while you may expect this to be encoded like 6631c0, aka
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; xor %ax, %ax, the upper 16 bits of the register used for
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; i16 are left undefined, so it's not wrong to clear them.
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;
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; discarding the 66 prefix is shorter, so this test expects
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; that we do so.
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;
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; asm: xor %eax, %eax
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[-,%rax] v0 = iconst.i16 0 ; bin: 31 c0
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; asm: xor %edi, %edi
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[-,%rdi] v1 = iconst.i16 0 ; bin: 31 ff
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return v0
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}
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function %zero_byte() -> i8 fast {
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ebb0:
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; asm: xor %r8b, %r8b
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[-,%r15] v0 = iconst.i8 0 ; bin: 45 30 ff
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; asm: xor %al, %al
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[-,%rax] v1 = iconst.i8 0 ; bin: 30 c0
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; asm: xor %dh, %dh
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[-,%rdi] v2 = iconst.i8 0 ; bin: 30 ff
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return v0
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}
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