6197bfff72
This gives the target ISA a chance to reserve registers like the stack pointer or hard-wired 0 registers like %x0 on RISC-V.
25 lines
673 B
Rust
25 lines
673 B
Rust
//! ARM 64 ABI implementation.
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use ir;
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use isa::RegClass;
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use regalloc::AllocatableSet;
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use settings as shared_settings;
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use super::registers::{GPR, FPR};
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/// Legalize `sig`.
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pub fn legalize_signature(_sig: &mut ir::Signature,
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_flags: &shared_settings::Flags,
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_current: bool) {
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unimplemented!()
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}
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/// Get register class for a type appearing in a legalized signature.
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pub fn regclass_for_abi_type(ty: ir::Type) -> RegClass {
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if ty.is_int() { GPR } else { FPR }
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}
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/// Get the set of allocatable registers for `func`.
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pub fn allocatable_registers(_func: &ir::Function) -> AllocatableSet {
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unimplemented!()
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}
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